From 87920b44a1e04a45bf74ee0a88a2dfa51c65acdb Mon Sep 17 00:00:00 2001 From: Peter Crosthwaite Date: Mon, 3 Jun 2013 17:17:41 +0100 Subject: xilinx_spips: Make interrupts clear on read By default these interrupts are clear on read. Signed-off-by: Peter Crosthwaite Reviewed-by: Peter Maydell Reviewed-by: Edgar E. Iglesias Message-id: 999ff0091ed3cc3969a431bf55c00ef934cecc8e.1369117359.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell --- hw/ssi/xilinx_spips.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'hw/ssi') diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c index 734adf0ea7..261d948ba7 100644 --- a/hw/ssi/xilinx_spips.c +++ b/hw/ssi/xilinx_spips.c @@ -330,6 +330,10 @@ static uint64_t xilinx_spips_read(void *opaque, hwaddr addr, mask = 0x0002FFFF; break; case R_INTR_STATUS: + ret = s->regs[addr] & IXR_ALL; + s->regs[addr] = 0; + DB_PRINT("addr=" TARGET_FMT_plx " = %x\n", addr * 4, ret); + return ret; case R_INTR_MASK: mask = IXR_ALL; break; -- cgit v1.2.1