From aaab89a68ed1f0ab791cfda2061be34c102490b1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Thu, 23 Jan 2014 16:37:55 +0100 Subject: ppcemb-softmmu: Drop Mac and e500 emulation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit They are still available in ppc-softmmu and ppc64-softmmu. Signed-off-by: Andreas Färber --- hw/ppc/Makefile.objs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'hw') diff --git a/hw/ppc/Makefile.objs b/hw/ppc/Makefile.objs index 2dd5284532..ea747f0a20 100644 --- a/hw/ppc/Makefile.objs +++ b/hw/ppc/Makefile.objs @@ -10,9 +10,9 @@ obj-y += ppc4xx_pci.o # PReP obj-$(CONFIG_PREP) += prep.o # OldWorld PowerMac -obj-y += mac_oldworld.o +obj-$(CONFIG_MAC) += mac_oldworld.o # NewWorld PowerMac -obj-y += mac_newworld.o +obj-$(CONFIG_MAC) += mac_newworld.o # e500 obj-$(CONFIG_E500) += e500.o mpc8544ds.o e500plat.o obj-$(CONFIG_E500) += mpc8544_guts.o ppce500_spin.o -- cgit v1.2.1 From 6749695eaaf346c1667067e17ecc9d7d64b7f61c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Wed, 5 Feb 2014 15:21:38 +0100 Subject: nand: Don't use qdev_create() in nand_init() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Commit 7426aa72c36c908a7d0eae3e38568bb0a70de479 (nand: Don't inherit from Sysbus) changed the parent type of TYPE_NAND but continued to use qdev_create(), which handled a NULL BusState as SysBus. Use object_new() instead, and reuse the TYPE_NAND define while at it. Reported-by: Markus Armbruster Cc: Peter Crosthwaite Reviewed-by: Igor Mammedov Signed-off-by: Andreas Färber --- hw/block/nand.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'hw') diff --git a/hw/block/nand.c b/hw/block/nand.c index a871ce059a..6d7c804f01 100644 --- a/hw/block/nand.c +++ b/hw/block/nand.c @@ -632,7 +632,7 @@ DeviceState *nand_init(BlockDriverState *bdrv, int manf_id, int chip_id) if (nand_flash_ids[chip_id].size == 0) { hw_error("%s: Unsupported NAND chip ID.\n", __FUNCTION__); } - dev = qdev_create(NULL, "nand"); + dev = DEVICE(object_new(TYPE_NAND)); qdev_prop_set_uint8(dev, "manufacturer_id", manf_id); qdev_prop_set_uint8(dev, "chip_id", chip_id); if (bdrv) { -- cgit v1.2.1 From a5c828525e82dbf9f78dcc15070dd49025471afe Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Sat, 3 Aug 2013 00:18:51 +0200 Subject: i2c: Rename i2c_bus to I2CBus MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Reviewed-by: Peter Crosthwaite Signed-off-by: Andreas Färber --- hw/acpi/piix4.c | 6 +++--- hw/arm/exynos4210.c | 2 +- hw/arm/musicpal.c | 4 ++-- hw/arm/nseries.c | 2 +- hw/arm/pxa2xx.c | 6 +++--- hw/arm/realview.c | 4 ++-- hw/arm/spitz.c | 2 +- hw/arm/stellaris.c | 8 ++++---- hw/arm/tosa.c | 2 +- hw/arm/versatilepb.c | 4 ++-- hw/arm/z2.c | 2 +- hw/i2c/bitbang_i2c.c | 6 +++--- hw/i2c/bitbang_i2c.h | 2 +- hw/i2c/core.c | 32 ++++++++++++++++---------------- hw/i2c/exynos4210_i2c.c | 2 +- hw/i2c/omap_i2c.c | 4 ++-- hw/i2c/pm_smbus.c | 2 +- hw/i2c/smbus.c | 18 +++++++++--------- hw/i2c/smbus_eeprom.c | 2 +- hw/i2c/smbus_ich9.c | 2 +- hw/i2c/versatile_i2c.c | 2 +- hw/i386/pc_piix.c | 2 +- hw/isa/vt82c686.c | 4 ++-- hw/mips/mips_fulong2e.c | 2 +- hw/mips/mips_malta.c | 2 +- 25 files changed, 62 insertions(+), 62 deletions(-) (limited to 'hw') diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c index 5d55a3c222..33e812d238 100644 --- a/hw/acpi/piix4.c +++ b/hw/acpi/piix4.c @@ -517,9 +517,9 @@ Object *piix4_pm_find(void) return o; } -i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, - qemu_irq sci_irq, qemu_irq smi_irq, - int kvm_enabled, FWCfgState *fw_cfg) +I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, + qemu_irq sci_irq, qemu_irq smi_irq, + int kvm_enabled, FWCfgState *fw_cfg) { DeviceState *dev; PIIX4PMState *s; diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c index 4ebb9381b0..9f137e9acd 100644 --- a/hw/arm/exynos4210.c +++ b/hw/arm/exynos4210.c @@ -326,7 +326,7 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem, busdev = SYS_BUS_DEVICE(dev); sysbus_connect_irq(busdev, 0, i2c_irq); sysbus_mmio_map(busdev, 0, addr); - s->i2c_if[n] = (i2c_bus *)qdev_get_child_bus(dev, "i2c"); + s->i2c_if[n] = (I2CBus *)qdev_get_child_bus(dev, "i2c"); } diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c index 023e8756e2..50a3b8fe4f 100644 --- a/hw/arm/musicpal.c +++ b/hw/arm/musicpal.c @@ -1593,7 +1593,7 @@ static void musicpal_init(QEMUMachineInitArgs *args) DeviceState *key_dev; DeviceState *wm8750_dev; SysBusDevice *s; - i2c_bus *i2c; + I2CBus *i2c; int i; unsigned long flash_size; DriveInfo *dinfo; @@ -1687,7 +1687,7 @@ static void musicpal_init(QEMUMachineInitArgs *args) dev = sysbus_create_simple(TYPE_MUSICPAL_GPIO, MP_GPIO_BASE, pic[MP_GPIO_IRQ]); i2c_dev = sysbus_create_simple("gpio_i2c", -1, NULL); - i2c = (i2c_bus *)qdev_get_child_bus(i2c_dev, "i2c"); + i2c = (I2CBus *)qdev_get_child_bus(i2c_dev, "i2c"); lcd_dev = sysbus_create_simple(TYPE_MUSICPAL_LCD, MP_LCD_BASE, NULL); key_dev = sysbus_create_simple(TYPE_MUSICPAL_KEY, -1, NULL); diff --git a/hw/arm/nseries.c b/hw/arm/nseries.c index 9ef31ca37a..c28f895c7a 100644 --- a/hw/arm/nseries.c +++ b/hw/arm/nseries.c @@ -202,7 +202,7 @@ static void n8x0_i2c_setup(struct n800_s *s) { DeviceState *dev; qemu_irq tmp_irq = qdev_get_gpio_in(s->mpu->gpio, N8X0_TMP105_GPIO); - i2c_bus *i2c = omap_i2c_bus(s->mpu->i2c[0]); + I2CBus *i2c = omap_i2c_bus(s->mpu->i2c[0]); /* Attach a menelaus PM chip */ dev = i2c_create_slave(i2c, "twl92230", N8X0_MENELAUS_ADDR); diff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c index 25ec549e71..7de109c92b 100644 --- a/hw/arm/pxa2xx.c +++ b/hw/arm/pxa2xx.c @@ -1238,7 +1238,7 @@ struct PXA2xxI2CState { MemoryRegion iomem; PXA2xxI2CSlaveState *slave; - i2c_bus *bus; + I2CBus *bus; qemu_irq irq; uint32_t offset; uint32_t region_size; @@ -1482,7 +1482,7 @@ PXA2xxI2CState *pxa2xx_i2c_init(hwaddr base, DeviceState *dev; SysBusDevice *i2c_dev; PXA2xxI2CState *s; - i2c_bus *i2cbus; + I2CBus *i2cbus; dev = qdev_create(NULL, TYPE_PXA2XX_I2C); qdev_prop_set_uint32(dev, "size", region_size + 1); @@ -1518,7 +1518,7 @@ static int pxa2xx_i2c_initfn(SysBusDevice *sbd) return 0; } -i2c_bus *pxa2xx_i2c_bus(PXA2xxI2CState *s) +I2CBus *pxa2xx_i2c_bus(PXA2xxI2CState *s) { return s->bus; } diff --git a/hw/arm/realview.c b/hw/arm/realview.c index 8d845ddb73..6ef7646002 100644 --- a/hw/arm/realview.c +++ b/hw/arm/realview.c @@ -60,7 +60,7 @@ static void realview_init(QEMUMachineInitArgs *args, qemu_irq mmc_irq[2]; PCIBus *pci_bus = NULL; NICInfo *nd; - i2c_bus *i2c; + I2CBus *i2c; int n; int done_nic = 0; qemu_irq cpu_irq[4]; @@ -255,7 +255,7 @@ static void realview_init(QEMUMachineInitArgs *args, } dev = sysbus_create_simple("versatile_i2c", 0x10002000, NULL); - i2c = (i2c_bus *)qdev_get_child_bus(dev, "i2c"); + i2c = (I2CBus *)qdev_get_child_bus(dev, "i2c"); i2c_create_slave(i2c, "ds1338", 0x68); /* Memory map for RealView Emulation Baseboard: */ diff --git a/hw/arm/spitz.c b/hw/arm/spitz.c index ba172835eb..2decff170f 100644 --- a/hw/arm/spitz.c +++ b/hw/arm/spitz.c @@ -734,7 +734,7 @@ static void spitz_wm8750_addr(void *opaque, int line, int level) static void spitz_i2c_setup(PXA2xxState *cpu) { /* Attach the CPU on one end of our I2C bus. */ - i2c_bus *bus = pxa2xx_i2c_bus(cpu->i2c[0]); + I2CBus *bus = pxa2xx_i2c_bus(cpu->i2c[0]); DeviceState *wm; diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c index 3170d69d42..d6cc77b458 100644 --- a/hw/arm/stellaris.c +++ b/hw/arm/stellaris.c @@ -692,7 +692,7 @@ static int stellaris_sys_init(uint32_t base, qemu_irq irq, typedef struct { SysBusDevice parent_obj; - i2c_bus *bus; + I2CBus *bus; qemu_irq irq; MemoryRegion iomem; uint32_t msa; @@ -868,7 +868,7 @@ static int stellaris_i2c_init(SysBusDevice *sbd) { DeviceState *dev = DEVICE(sbd); stellaris_i2c_state *s = STELLARIS_I2C(dev); - i2c_bus *bus; + I2CBus *bus; sysbus_init_irq(sbd, &s->irq); bus = i2c_init_bus(dev, "i2c"); @@ -1213,7 +1213,7 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model, qemu_irq adc; int sram_size; int flash_size; - i2c_bus *i2c; + I2CBus *i2c; DeviceState *dev; int i; int j; @@ -1256,7 +1256,7 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model, if (board->dc2 & (1 << 12)) { dev = sysbus_create_simple(TYPE_STELLARIS_I2C, 0x40020000, pic[8]); - i2c = (i2c_bus *)qdev_get_child_bus(dev, "i2c"); + i2c = (I2CBus *)qdev_get_child_bus(dev, "i2c"); if (board->peripherals & BP_OLED_I2C) { i2c_create_slave(i2c, "ssd0303", 0x3d); } diff --git a/hw/arm/tosa.c b/hw/arm/tosa.c index c00d8c27cc..dd224d33a2 100644 --- a/hw/arm/tosa.c +++ b/hw/arm/tosa.c @@ -194,7 +194,7 @@ static int tosa_dac_init(I2CSlave *i2c) static void tosa_tg_init(PXA2xxState *cpu) { - i2c_bus *bus = pxa2xx_i2c_bus(cpu->i2c[0]); + I2CBus *bus = pxa2xx_i2c_bus(cpu->i2c[0]); i2c_create_slave(bus, "tosa_dac", DAC_BASE); ssi_create_slave(cpu->ssp[1], "tosa-ssp"); } diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c index aef2bde0c4..e5493b428f 100644 --- a/hw/arm/versatilepb.c +++ b/hw/arm/versatilepb.c @@ -185,7 +185,7 @@ static void versatile_init(QEMUMachineInitArgs *args, int board_id) DeviceState *pl041; PCIBus *pci_bus; NICInfo *nd; - i2c_bus *i2c; + I2CBus *i2c; int n; int done_smc = 0; DriveInfo *dinfo; @@ -288,7 +288,7 @@ static void versatile_init(QEMUMachineInitArgs *args, int board_id) sysbus_create_simple("pl031", 0x101e8000, pic[10]); dev = sysbus_create_simple("versatile_i2c", 0x10002000, NULL); - i2c = (i2c_bus *)qdev_get_child_bus(dev, "i2c"); + i2c = (I2CBus *)qdev_get_child_bus(dev, "i2c"); i2c_create_slave(i2c, "ds1338", 0x68); /* Add PL041 AACI Interface to the LM4549 codec */ diff --git a/hw/arm/z2.c b/hw/arm/z2.c index 97367b1f8b..97ec38193e 100644 --- a/hw/arm/z2.c +++ b/hw/arm/z2.c @@ -308,7 +308,7 @@ static void z2_init(QEMUMachineInitArgs *args) DriveInfo *dinfo; int be; void *z2_lcd; - i2c_bus *bus; + I2CBus *bus; DeviceState *wm; if (!cpu_model) { diff --git a/hw/i2c/bitbang_i2c.c b/hw/i2c/bitbang_i2c.c index ca59456d16..6d1bb03d6c 100644 --- a/hw/i2c/bitbang_i2c.c +++ b/hw/i2c/bitbang_i2c.c @@ -46,7 +46,7 @@ typedef enum bitbang_i2c_state { } bitbang_i2c_state; struct bitbang_i2c_interface { - i2c_bus *bus; + I2CBus *bus; bitbang_i2c_state state; int last_data; int last_clock; @@ -170,7 +170,7 @@ int bitbang_i2c_set(bitbang_i2c_interface *i2c, int line, int level) abort(); } -bitbang_i2c_interface *bitbang_i2c_init(i2c_bus *bus) +bitbang_i2c_interface *bitbang_i2c_init(I2CBus *bus) { bitbang_i2c_interface *s; @@ -213,7 +213,7 @@ static int gpio_i2c_init(SysBusDevice *sbd) { DeviceState *dev = DEVICE(sbd); GPIOI2CState *s = GPIO_I2C(dev); - i2c_bus *bus; + I2CBus *bus; memory_region_init(&s->dummy_iomem, OBJECT(s), "gpio_i2c", 0); sysbus_init_mmio(sbd, &s->dummy_iomem); diff --git a/hw/i2c/bitbang_i2c.h b/hw/i2c/bitbang_i2c.h index 2866ac351b..3a7126d5de 100644 --- a/hw/i2c/bitbang_i2c.h +++ b/hw/i2c/bitbang_i2c.h @@ -8,7 +8,7 @@ typedef struct bitbang_i2c_interface bitbang_i2c_interface; #define BITBANG_I2C_SDA 0 #define BITBANG_I2C_SCL 1 -bitbang_i2c_interface *bitbang_i2c_init(i2c_bus *bus); +bitbang_i2c_interface *bitbang_i2c_init(I2CBus *bus); int bitbang_i2c_set(bitbang_i2c_interface *i2c, int line, int level); #endif diff --git a/hw/i2c/core.c b/hw/i2c/core.c index c97e7f7dc0..efd8b4fafb 100644 --- a/hw/i2c/core.c +++ b/hw/i2c/core.c @@ -9,7 +9,7 @@ #include "hw/i2c/i2c.h" -struct i2c_bus +struct I2CBus { BusState qbus; I2CSlave *current_dev; @@ -23,24 +23,24 @@ static Property i2c_props[] = { }; #define TYPE_I2C_BUS "i2c-bus" -#define I2C_BUS(obj) OBJECT_CHECK(i2c_bus, (obj), TYPE_I2C_BUS) +#define I2C_BUS(obj) OBJECT_CHECK(I2CBus, (obj), TYPE_I2C_BUS) static const TypeInfo i2c_bus_info = { .name = TYPE_I2C_BUS, .parent = TYPE_BUS, - .instance_size = sizeof(i2c_bus), + .instance_size = sizeof(I2CBus), }; static void i2c_bus_pre_save(void *opaque) { - i2c_bus *bus = opaque; + I2CBus *bus = opaque; bus->saved_address = bus->current_dev ? bus->current_dev->address : -1; } static int i2c_bus_post_load(void *opaque, int version_id) { - i2c_bus *bus = opaque; + I2CBus *bus = opaque; /* The bus is loaded before attached devices, so load and save the current device id. Devices will check themselves as loaded. */ @@ -56,15 +56,15 @@ static const VMStateDescription vmstate_i2c_bus = { .pre_save = i2c_bus_pre_save, .post_load = i2c_bus_post_load, .fields = (VMStateField []) { - VMSTATE_UINT8(saved_address, i2c_bus), + VMSTATE_UINT8(saved_address, I2CBus), VMSTATE_END_OF_LIST() } }; /* Create a new I2C bus. */ -i2c_bus *i2c_init_bus(DeviceState *parent, const char *name) +I2CBus *i2c_init_bus(DeviceState *parent, const char *name) { - i2c_bus *bus; + I2CBus *bus; bus = I2C_BUS(qbus_create(TYPE_I2C_BUS, parent, name)); vmstate_register(NULL, -1, &vmstate_i2c_bus, bus); @@ -77,14 +77,14 @@ void i2c_set_slave_address(I2CSlave *dev, uint8_t address) } /* Return nonzero if bus is busy. */ -int i2c_bus_busy(i2c_bus *bus) +int i2c_bus_busy(I2CBus *bus) { return bus->current_dev != NULL; } /* Returns non-zero if the address is not valid. */ /* TODO: Make this handle multiple masters. */ -int i2c_start_transfer(i2c_bus *bus, uint8_t address, int recv) +int i2c_start_transfer(I2CBus *bus, uint8_t address, int recv) { BusChild *kid; I2CSlave *slave = NULL; @@ -113,7 +113,7 @@ int i2c_start_transfer(i2c_bus *bus, uint8_t address, int recv) return 0; } -void i2c_end_transfer(i2c_bus *bus) +void i2c_end_transfer(I2CBus *bus) { I2CSlave *dev = bus->current_dev; I2CSlaveClass *sc; @@ -130,7 +130,7 @@ void i2c_end_transfer(i2c_bus *bus) bus->current_dev = NULL; } -int i2c_send(i2c_bus *bus, uint8_t data) +int i2c_send(I2CBus *bus, uint8_t data) { I2CSlave *dev = bus->current_dev; I2CSlaveClass *sc; @@ -147,7 +147,7 @@ int i2c_send(i2c_bus *bus, uint8_t data) return -1; } -int i2c_recv(i2c_bus *bus) +int i2c_recv(I2CBus *bus) { I2CSlave *dev = bus->current_dev; I2CSlaveClass *sc; @@ -164,7 +164,7 @@ int i2c_recv(i2c_bus *bus) return -1; } -void i2c_nack(i2c_bus *bus) +void i2c_nack(I2CBus *bus) { I2CSlave *dev = bus->current_dev; I2CSlaveClass *sc; @@ -182,7 +182,7 @@ void i2c_nack(i2c_bus *bus) static int i2c_slave_post_load(void *opaque, int version_id) { I2CSlave *dev = opaque; - i2c_bus *bus; + I2CBus *bus; bus = I2C_BUS(qdev_get_parent_bus(DEVICE(dev))); if (bus->saved_address == dev->address) { bus->current_dev = dev; @@ -210,7 +210,7 @@ static int i2c_slave_qdev_init(DeviceState *dev) return sc->init(s); } -DeviceState *i2c_create_slave(i2c_bus *bus, const char *name, uint8_t addr) +DeviceState *i2c_create_slave(I2CBus *bus, const char *name, uint8_t addr) { DeviceState *dev; diff --git a/hw/i2c/exynos4210_i2c.c b/hw/i2c/exynos4210_i2c.c index ce5f849c77..fb99dfda17 100644 --- a/hw/i2c/exynos4210_i2c.c +++ b/hw/i2c/exynos4210_i2c.c @@ -83,7 +83,7 @@ typedef struct Exynos4210I2CState { SysBusDevice parent_obj; MemoryRegion iomem; - i2c_bus *bus; + I2CBus *bus; qemu_irq irq; uint8_t i2ccon; diff --git a/hw/i2c/omap_i2c.c b/hw/i2c/omap_i2c.c index 2d8e2b7839..d63278dbde 100644 --- a/hw/i2c/omap_i2c.c +++ b/hw/i2c/omap_i2c.c @@ -30,7 +30,7 @@ typedef struct OMAPI2CState { MemoryRegion iomem; qemu_irq irq; qemu_irq drq[2]; - i2c_bus *bus; + I2CBus *bus; uint8_t revision; void *iclk; @@ -491,7 +491,7 @@ static void omap_i2c_register_types(void) type_register_static(&omap_i2c_info); } -i2c_bus *omap_i2c_bus(DeviceState *omap_i2c) +I2CBus *omap_i2c_bus(DeviceState *omap_i2c) { OMAPI2CState *s = OMAP_I2C(omap_i2c); return s->bus; diff --git a/hw/i2c/pm_smbus.c b/hw/i2c/pm_smbus.c index c98e447533..9f50067735 100644 --- a/hw/i2c/pm_smbus.c +++ b/hw/i2c/pm_smbus.c @@ -59,7 +59,7 @@ static void smb_transaction(PMSMBus *s) uint8_t read = s->smb_addr & 0x01; uint8_t cmd = s->smb_cmd; uint8_t addr = s->smb_addr >> 1; - i2c_bus *bus = s->smbus; + I2CBus *bus = s->smbus; SMBUS_DPRINTF("SMBus trans addr=0x%02x prot=0x%02x\n", addr, prot); /* Transaction isn't exec if STS_DEV_ERR bit set */ diff --git a/hw/i2c/smbus.c b/hw/i2c/smbus.c index 25d2d04163..3febf3c258 100644 --- a/hw/i2c/smbus.c +++ b/hw/i2c/smbus.c @@ -208,13 +208,13 @@ static int smbus_device_init(I2CSlave *i2c) } /* Master device commands. */ -void smbus_quick_command(i2c_bus *bus, uint8_t addr, int read) +void smbus_quick_command(I2CBus *bus, uint8_t addr, int read) { i2c_start_transfer(bus, addr, read); i2c_end_transfer(bus); } -uint8_t smbus_receive_byte(i2c_bus *bus, uint8_t addr) +uint8_t smbus_receive_byte(I2CBus *bus, uint8_t addr) { uint8_t data; @@ -225,14 +225,14 @@ uint8_t smbus_receive_byte(i2c_bus *bus, uint8_t addr) return data; } -void smbus_send_byte(i2c_bus *bus, uint8_t addr, uint8_t data) +void smbus_send_byte(I2CBus *bus, uint8_t addr, uint8_t data) { i2c_start_transfer(bus, addr, 0); i2c_send(bus, data); i2c_end_transfer(bus); } -uint8_t smbus_read_byte(i2c_bus *bus, uint8_t addr, uint8_t command) +uint8_t smbus_read_byte(I2CBus *bus, uint8_t addr, uint8_t command) { uint8_t data; i2c_start_transfer(bus, addr, 0); @@ -244,7 +244,7 @@ uint8_t smbus_read_byte(i2c_bus *bus, uint8_t addr, uint8_t command) return data; } -void smbus_write_byte(i2c_bus *bus, uint8_t addr, uint8_t command, uint8_t data) +void smbus_write_byte(I2CBus *bus, uint8_t addr, uint8_t command, uint8_t data) { i2c_start_transfer(bus, addr, 0); i2c_send(bus, command); @@ -252,7 +252,7 @@ void smbus_write_byte(i2c_bus *bus, uint8_t addr, uint8_t command, uint8_t data) i2c_end_transfer(bus); } -uint16_t smbus_read_word(i2c_bus *bus, uint8_t addr, uint8_t command) +uint16_t smbus_read_word(I2CBus *bus, uint8_t addr, uint8_t command) { uint16_t data; i2c_start_transfer(bus, addr, 0); @@ -265,7 +265,7 @@ uint16_t smbus_read_word(i2c_bus *bus, uint8_t addr, uint8_t command) return data; } -void smbus_write_word(i2c_bus *bus, uint8_t addr, uint8_t command, uint16_t data) +void smbus_write_word(I2CBus *bus, uint8_t addr, uint8_t command, uint16_t data) { i2c_start_transfer(bus, addr, 0); i2c_send(bus, command); @@ -274,7 +274,7 @@ void smbus_write_word(i2c_bus *bus, uint8_t addr, uint8_t command, uint16_t data i2c_end_transfer(bus); } -int smbus_read_block(i2c_bus *bus, uint8_t addr, uint8_t command, uint8_t *data) +int smbus_read_block(I2CBus *bus, uint8_t addr, uint8_t command, uint8_t *data) { int len; int i; @@ -292,7 +292,7 @@ int smbus_read_block(i2c_bus *bus, uint8_t addr, uint8_t command, uint8_t *data) return len; } -void smbus_write_block(i2c_bus *bus, uint8_t addr, uint8_t command, uint8_t *data, +void smbus_write_block(I2CBus *bus, uint8_t addr, uint8_t command, uint8_t *data, int len) { int i; diff --git a/hw/i2c/smbus_eeprom.c b/hw/i2c/smbus_eeprom.c index 0218f8a0eb..86f35c11de 100644 --- a/hw/i2c/smbus_eeprom.c +++ b/hw/i2c/smbus_eeprom.c @@ -139,7 +139,7 @@ static void smbus_eeprom_register_types(void) type_init(smbus_eeprom_register_types) -void smbus_eeprom_init(i2c_bus *smbus, int nb_eeprom, +void smbus_eeprom_init(I2CBus *smbus, int nb_eeprom, const uint8_t *eeprom_spd, int eeprom_spd_size) { int i; diff --git a/hw/i2c/smbus_ich9.c b/hw/i2c/smbus_ich9.c index 8d47eaffc8..295b62ed29 100644 --- a/hw/i2c/smbus_ich9.c +++ b/hw/i2c/smbus_ich9.c @@ -108,7 +108,7 @@ static void ich9_smb_class_init(ObjectClass *klass, void *data) dc->cannot_instantiate_with_device_add_yet = true; } -i2c_bus *ich9_smb_init(PCIBus *bus, int devfn, uint32_t smb_io_base) +I2CBus *ich9_smb_init(PCIBus *bus, int devfn, uint32_t smb_io_base) { PCIDevice *d = pci_create_simple_multifunction(bus, devfn, true, TYPE_ICH9_SMB_DEVICE); diff --git a/hw/i2c/versatile_i2c.c b/hw/i2c/versatile_i2c.c index 02e9f171b9..3c0c2c1067 100644 --- a/hw/i2c/versatile_i2c.c +++ b/hw/i2c/versatile_i2c.c @@ -81,7 +81,7 @@ static int versatile_i2c_init(SysBusDevice *sbd) { DeviceState *dev = DEVICE(sbd); VersatileI2CState *s = VERSATILE_I2C(dev); - i2c_bus *bus; + I2CBus *bus; bus = i2c_init_bus(dev, "i2c"); s->bitbang = bitbang_i2c_init(bus); diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index a327d71fb1..3639a6d099 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -236,7 +236,7 @@ static void pc_init1(QEMUMachineInitArgs *args, } if (pci_enabled && acpi_enabled) { - i2c_bus *smbus; + I2CBus *smbus; smi_irq = qemu_allocate_irqs(pc_acpi_smi_interrupt, first_cpu, 1); /* TODO: Populate SPD eeprom data. */ diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c index e639357db3..1a93afda4f 100644 --- a/hw/isa/vt82c686.c +++ b/hw/isa/vt82c686.c @@ -369,8 +369,8 @@ static int vt82c686b_pm_initfn(PCIDevice *dev) return 0; } -i2c_bus *vt82c686b_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, - qemu_irq sci_irq) +I2CBus *vt82c686b_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, + qemu_irq sci_irq) { PCIDevice *dev; VT686PMState *s; diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c index 9ef3a978e2..e1551aabe2 100644 --- a/hw/mips/mips_fulong2e.c +++ b/hw/mips/mips_fulong2e.c @@ -276,7 +276,7 @@ static void mips_fulong2e_init(QEMUMachineInitArgs *args) qemu_irq *cpu_exit_irq; PCIBus *pci_bus; ISABus *isa_bus; - i2c_bus *smbus; + I2CBus *smbus; int i; DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; MIPSCPU *cpu; diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c index 05c8771220..ac5ec44db0 100644 --- a/hw/mips/mips_malta.c +++ b/hw/mips/mips_malta.c @@ -900,7 +900,7 @@ void mips_malta_init(QEMUMachineInitArgs *args) qemu_irq *isa_irq; qemu_irq *cpu_exit_irq; int piix4_devfn; - i2c_bus *smbus; + I2CBus *smbus; int i; DriveInfo *dinfo; DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; -- cgit v1.2.1 From 96dca6b9a964b96c3ce72449333ff3bdd4ce85f7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Thu, 19 Dec 2013 21:44:53 +0100 Subject: pxa2xx: QOM'ify I2C slave MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Replace usages of FROM_I2C_SLAVE() and direct parent field accesses with QOM cast macro. Rename parent field to assure we caught all. Reuse type constant in pxa2xx_i2c_init(). Add some missing braces while at it. Signed-off-by: Andreas Färber --- hw/arm/pxa2xx.c | 38 +++++++++++++++++++++++++------------- 1 file changed, 25 insertions(+), 13 deletions(-) (limited to 'hw') diff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c index 7de109c92b..66bc0dccc9 100644 --- a/hw/arm/pxa2xx.c +++ b/hw/arm/pxa2xx.c @@ -1222,8 +1222,14 @@ static const TypeInfo pxa2xx_rtc_sysbus_info = { }; /* I2C Interface */ -typedef struct { - I2CSlave i2c; + +#define TYPE_PXA2XX_I2C_SLAVE "pxa2xx-i2c-slave" +#define PXA2XX_I2C_SLAVE(obj) \ + OBJECT_CHECK(PXA2xxI2CSlaveState, (obj), TYPE_PXA2XX_I2C_SLAVE) + +typedef struct PXA2xxI2CSlaveState { + I2CSlave parent_obj; + PXA2xxI2CState *host; } PXA2xxI2CSlaveState; @@ -1268,7 +1274,7 @@ static void pxa2xx_i2c_update(PXA2xxI2CState *s) /* These are only stubs now. */ static void pxa2xx_i2c_event(I2CSlave *i2c, enum i2c_event event) { - PXA2xxI2CSlaveState *slave = FROM_I2C_SLAVE(PXA2xxI2CSlaveState, i2c); + PXA2xxI2CSlaveState *slave = PXA2XX_I2C_SLAVE(i2c); PXA2xxI2CState *s = slave->host; switch (event) { @@ -1292,10 +1298,12 @@ static void pxa2xx_i2c_event(I2CSlave *i2c, enum i2c_event event) static int pxa2xx_i2c_rx(I2CSlave *i2c) { - PXA2xxI2CSlaveState *slave = FROM_I2C_SLAVE(PXA2xxI2CSlaveState, i2c); + PXA2xxI2CSlaveState *slave = PXA2XX_I2C_SLAVE(i2c); PXA2xxI2CState *s = slave->host; - if ((s->control & (1 << 14)) || !(s->control & (1 << 6))) + + if ((s->control & (1 << 14)) || !(s->control & (1 << 6))) { return 0; + } if (s->status & (1 << 0)) { /* RWM */ s->status |= 1 << 6; /* set ITE */ @@ -1307,10 +1315,12 @@ static int pxa2xx_i2c_rx(I2CSlave *i2c) static int pxa2xx_i2c_tx(I2CSlave *i2c, uint8_t data) { - PXA2xxI2CSlaveState *slave = FROM_I2C_SLAVE(PXA2xxI2CSlaveState, i2c); + PXA2xxI2CSlaveState *slave = PXA2XX_I2C_SLAVE(i2c); PXA2xxI2CState *s = slave->host; - if ((s->control & (1 << 14)) || !(s->control & (1 << 6))) + + if ((s->control & (1 << 14)) || !(s->control & (1 << 6))) { return 1; + } if (!(s->status & (1 << 0))) { /* RWM */ s->status |= 1 << 7; /* set IRF */ @@ -1325,6 +1335,7 @@ static uint64_t pxa2xx_i2c_read(void *opaque, hwaddr addr, unsigned size) { PXA2xxI2CState *s = (PXA2xxI2CState *) opaque; + I2CSlave *slave; addr -= s->offset; switch (addr) { @@ -1333,7 +1344,8 @@ static uint64_t pxa2xx_i2c_read(void *opaque, hwaddr addr, case ISR: return s->status | (i2c_bus_busy(s->bus) << 2); case ISAR: - return s->slave->i2c.address; + slave = I2C_SLAVE(s->slave); + return slave->address; case IDBR: return s->data; case IBMR: @@ -1408,7 +1420,7 @@ static void pxa2xx_i2c_write(void *opaque, hwaddr addr, break; case ISAR: - i2c_set_slave_address(&s->slave->i2c, value & 0x7f); + i2c_set_slave_address(I2C_SLAVE(s->slave), value & 0x7f); break; case IDBR: @@ -1432,7 +1444,7 @@ static const VMStateDescription vmstate_pxa2xx_i2c_slave = { .minimum_version_id = 1, .minimum_version_id_old = 1, .fields = (VMStateField []) { - VMSTATE_I2C_SLAVE(i2c, PXA2xxI2CSlaveState), + VMSTATE_I2C_SLAVE(parent_obj, PXA2xxI2CSlaveState), VMSTATE_END_OF_LIST() } }; @@ -1470,7 +1482,7 @@ static void pxa2xx_i2c_slave_class_init(ObjectClass *klass, void *data) } static const TypeInfo pxa2xx_i2c_slave_info = { - .name = "pxa2xx-i2c-slave", + .name = TYPE_PXA2XX_I2C_SLAVE, .parent = TYPE_I2C_SLAVE, .instance_size = sizeof(PXA2xxI2CSlaveState), .class_init = pxa2xx_i2c_slave_class_init, @@ -1496,8 +1508,8 @@ PXA2xxI2CState *pxa2xx_i2c_init(hwaddr base, s = PXA2XX_I2C(i2c_dev); /* FIXME: Should the slave device really be on a separate bus? */ i2cbus = i2c_init_bus(dev, "dummy"); - dev = i2c_create_slave(i2cbus, "pxa2xx-i2c-slave", 0); - s->slave = FROM_I2C_SLAVE(PXA2xxI2CSlaveState, I2C_SLAVE(dev)); + dev = i2c_create_slave(i2cbus, TYPE_PXA2XX_I2C_SLAVE, 0); + s->slave = PXA2XX_I2C_SLAVE(dev); s->slave->host = s; return s; -- cgit v1.2.1 From 70b51690328872e0903e0615f32f05678f6b53cf Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Thu, 19 Dec 2013 21:51:29 +0100 Subject: tosa: QOM'ify DAC MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Replace usages of FROM_I2C_SLAVE() with QOM cast macro. Rename parent field. Use type constant in tosa_tg_init(). Reviewed-by: Peter Crosthwaite Signed-off-by: Andreas Färber --- hw/arm/tosa.c | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) (limited to 'hw') diff --git a/hw/arm/tosa.c b/hw/arm/tosa.c index dd224d33a2..2069f55432 100644 --- a/hw/arm/tosa.c +++ b/hw/arm/tosa.c @@ -132,15 +132,20 @@ static int tosa_ssp_init(SSISlave *dev) return 0; } +#define TYPE_TOSA_DAC "tosa_dac" +#define TOSA_DAC(obj) OBJECT_CHECK(TosaDACState, (obj), TYPE_TOSA_DAC) + typedef struct { - I2CSlave i2c; + I2CSlave parent_obj; + int len; char buf[3]; } TosaDACState; static int tosa_dac_send(I2CSlave *i2c, uint8_t data) { - TosaDACState *s = FROM_I2C_SLAVE(TosaDACState, i2c); + TosaDACState *s = TOSA_DAC(i2c); + s->buf[s->len] = data; if (s->len ++ > 2) { #ifdef VERBOSE @@ -159,7 +164,8 @@ static int tosa_dac_send(I2CSlave *i2c, uint8_t data) static void tosa_dac_event(I2CSlave *i2c, enum i2c_event event) { - TosaDACState *s = FROM_I2C_SLAVE(TosaDACState, i2c); + TosaDACState *s = TOSA_DAC(i2c); + s->len = 0; switch (event) { case I2C_START_SEND: @@ -195,7 +201,7 @@ static int tosa_dac_init(I2CSlave *i2c) static void tosa_tg_init(PXA2xxState *cpu) { I2CBus *bus = pxa2xx_i2c_bus(cpu->i2c[0]); - i2c_create_slave(bus, "tosa_dac", DAC_BASE); + i2c_create_slave(bus, TYPE_TOSA_DAC, DAC_BASE); ssi_create_slave(cpu->ssp[1], "tosa-ssp"); } @@ -271,7 +277,7 @@ static void tosa_dac_class_init(ObjectClass *klass, void *data) } static const TypeInfo tosa_dac_info = { - .name = "tosa_dac", + .name = TYPE_TOSA_DAC, .parent = TYPE_I2C_SLAVE, .instance_size = sizeof(TosaDACState), .class_init = tosa_dac_class_init, -- cgit v1.2.1 From a5f96db7e826ab787ca5fc283aebded5577cb6e2 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Thu, 19 Dec 2013 21:55:44 +0100 Subject: z2: QOM'ify AER915 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Replace usages of FROM_I2C_SLAVE() with QOM cast macro. Rename the parent field. Reuse the type constant in z2_init(). Reviewed-by: Peter Crosthwaite [AF: Use TYPE_AER915 in z2_init() too] Signed-off-by: Andreas Färber --- hw/arm/z2.c | 20 +++++++++++++------- 1 file changed, 13 insertions(+), 7 deletions(-) (limited to 'hw') diff --git a/hw/arm/z2.c b/hw/arm/z2.c index 97ec38193e..67c1be84ac 100644 --- a/hw/arm/z2.c +++ b/hw/arm/z2.c @@ -193,15 +193,20 @@ static const TypeInfo zipit_lcd_info = { .class_init = zipit_lcd_class_init, }; -typedef struct { - I2CSlave i2c; +#define TYPE_AER915 "aer915" +#define AER915(obj) OBJECT_CHECK(AER915State, (obj), TYPE_AER915) + +typedef struct AER915State { + I2CSlave parent_obj; + int len; uint8_t buf[3]; } AER915State; static int aer915_send(I2CSlave *i2c, uint8_t data) { - AER915State *s = FROM_I2C_SLAVE(AER915State, i2c); + AER915State *s = AER915(i2c); + s->buf[s->len] = data; if (s->len++ > 2) { DPRINTF("%s: message too long (%i bytes)\n", @@ -219,7 +224,8 @@ static int aer915_send(I2CSlave *i2c, uint8_t data) static void aer915_event(I2CSlave *i2c, enum i2c_event event) { - AER915State *s = FROM_I2C_SLAVE(AER915State, i2c); + AER915State *s = AER915(i2c); + switch (event) { case I2C_START_SEND: s->len = 0; @@ -238,8 +244,8 @@ static void aer915_event(I2CSlave *i2c, enum i2c_event event) static int aer915_recv(I2CSlave *slave) { + AER915State *s = AER915(slave); int retval = 0x00; - AER915State *s = FROM_I2C_SLAVE(AER915State, slave); switch (s->buf[0]) { /* Return hardcoded battery voltage, @@ -290,7 +296,7 @@ static void aer915_class_init(ObjectClass *klass, void *data) } static const TypeInfo aer915_info = { - .name = "aer915", + .name = TYPE_AER915, .parent = TYPE_I2C_SLAVE, .instance_size = sizeof(AER915State), .class_init = aer915_class_init, @@ -351,7 +357,7 @@ static void z2_init(QEMUMachineInitArgs *args) type_register_static(&aer915_info); z2_lcd = ssi_create_slave(mpu->ssp[1], "zipit-lcd"); bus = pxa2xx_i2c_bus(mpu->i2c[0]); - i2c_create_slave(bus, "aer915", 0x55); + i2c_create_slave(bus, TYPE_AER915, 0x55); wm = i2c_create_slave(bus, "wm8750", 0x1b); mpu->i2s->opaque = wm; mpu->i2s->codec_out = wm8750_dac_dat; -- cgit v1.2.1 From bc229b0f901ef94a8245fb619a138604e2a456bb Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Thu, 19 Dec 2013 22:04:29 +0100 Subject: wm8750: QOM'ify MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Replace usages of FROM_I2C_SLAVE() and direct parent field accesses with QOM cast macro. Rename parent field. Reviewed-by: Peter Crosthwaite Signed-off-by: Andreas Färber --- hw/audio/wm8750.c | 33 ++++++++++++++++++++------------- 1 file changed, 20 insertions(+), 13 deletions(-) (limited to 'hw') diff --git a/hw/audio/wm8750.c b/hw/audio/wm8750.c index 6b5a3499bb..c18f2457a1 100644 --- a/hw/audio/wm8750.c +++ b/hw/audio/wm8750.c @@ -23,8 +23,12 @@ typedef struct { int dac_hz; } WMRate; -typedef struct { - I2CSlave i2c; +#define TYPE_WM8750 "wm8750" +#define WM8750(obj) OBJECT_CHECK(WM8750State, (obj), TYPE_WM8750) + +typedef struct WM8750State { + I2CSlave parent_obj; + uint8_t i2c_data[2]; int i2c_len; QEMUSoundCard card; @@ -256,7 +260,8 @@ static void wm8750_clk_update(WM8750State *s, int ext) static void wm8750_reset(I2CSlave *i2c) { - WM8750State *s = (WM8750State *) i2c; + WM8750State *s = WM8750(i2c); + s->rate = &wm_rate_table[0]; s->enable = 0; wm8750_clk_update(s, 1); @@ -299,7 +304,7 @@ static void wm8750_reset(I2CSlave *i2c) static void wm8750_event(I2CSlave *i2c, enum i2c_event event) { - WM8750State *s = (WM8750State *) i2c; + WM8750State *s = WM8750(i2c); switch (event) { case I2C_START_SEND: @@ -356,7 +361,7 @@ static void wm8750_event(I2CSlave *i2c, enum i2c_event event) static int wm8750_tx(I2CSlave *i2c, uint8_t data) { - WM8750State *s = (WM8750State *) i2c; + WM8750State *s = WM8750(i2c); uint8_t cmd; uint16_t value; @@ -542,7 +547,7 @@ static int wm8750_tx(I2CSlave *i2c, uint8_t data) break; case WM8750_RESET: /* Reset */ - wm8750_reset(&s->i2c); + wm8750_reset(I2C_SLAVE(s)); break; #ifdef VERBOSE @@ -604,17 +609,17 @@ static const VMStateDescription vmstate_wm8750 = { VMSTATE_UINT8(format, WM8750State), VMSTATE_UINT8(power, WM8750State), VMSTATE_UINT8(rate_vmstate, WM8750State), - VMSTATE_I2C_SLAVE(i2c, WM8750State), + VMSTATE_I2C_SLAVE(parent_obj, WM8750State), VMSTATE_END_OF_LIST() } }; static int wm8750_init(I2CSlave *i2c) { - WM8750State *s = FROM_I2C_SLAVE(WM8750State, i2c); + WM8750State *s = WM8750(i2c); AUD_register_card(CODEC, &s->card); - wm8750_reset(&s->i2c); + wm8750_reset(I2C_SLAVE(s)); return 0; } @@ -622,8 +627,9 @@ static int wm8750_init(I2CSlave *i2c) #if 0 static void wm8750_fini(I2CSlave *i2c) { - WM8750State *s = (WM8750State *) i2c; - wm8750_reset(&s->i2c); + WM8750State *s = WM8750(i2c); + + wm8750_reset(I2C_SLAVE(s)); AUD_remove_card(&s->card); g_free(s); } @@ -632,7 +638,8 @@ static void wm8750_fini(I2CSlave *i2c) void wm8750_data_req_set(DeviceState *dev, void (*data_req)(void *, int, int), void *opaque) { - WM8750State *s = FROM_I2C_SLAVE(WM8750State, I2C_SLAVE(dev)); + WM8750State *s = WM8750(dev); + s->data_req = data_req; s->opaque = opaque; } @@ -702,7 +709,7 @@ static void wm8750_class_init(ObjectClass *klass, void *data) } static const TypeInfo wm8750_info = { - .name = "wm8750", + .name = TYPE_WM8750, .parent = TYPE_I2C_SLAVE, .instance_size = sizeof(WM8750State), .class_init = wm8750_class_init, -- cgit v1.2.1 From b1be45153e416fa13cf6fcea704f26f4d3c2b7aa Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Thu, 19 Dec 2013 22:10:23 +0100 Subject: ssd0303: QOM'ify MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Replace usages of FROM_I2C_SLAVE() with QOM cast macro. Rename parent field. Reviewed-by: Peter Crosthwaite Signed-off-by: Andreas Färber --- hw/display/ssd0303.c | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) (limited to 'hw') diff --git a/hw/display/ssd0303.c b/hw/display/ssd0303.c index beea5bf22c..89804e108b 100644 --- a/hw/display/ssd0303.c +++ b/hw/display/ssd0303.c @@ -41,8 +41,12 @@ enum ssd0303_cmd { SSD0303_CMD_SKIP1 }; +#define TYPE_SSD0303 "ssd0303" +#define SSD0303(obj) OBJECT_CHECK(ssd0303_state, (obj), TYPE_SSD0303) + typedef struct { - I2CSlave i2c; + I2CSlave parent_obj; + QemuConsole *con; int row; int col; @@ -65,8 +69,9 @@ static int ssd0303_recv(I2CSlave *i2c) static int ssd0303_send(I2CSlave *i2c, uint8_t data) { - ssd0303_state *s = (ssd0303_state *)i2c; + ssd0303_state *s = SSD0303(i2c); enum ssd0303_cmd old_cmd_state; + switch (s->mode) { case SSD0303_IDLE: DPRINTF("byte 0x%02x\n", data); @@ -175,7 +180,8 @@ static int ssd0303_send(I2CSlave *i2c, uint8_t data) static void ssd0303_event(I2CSlave *i2c, enum i2c_event event) { - ssd0303_state *s = (ssd0303_state *)i2c; + ssd0303_state *s = SSD0303(i2c); + switch (event) { case I2C_FINISH: s->mode = SSD0303_IDLE; @@ -279,7 +285,7 @@ static const VMStateDescription vmstate_ssd0303 = { VMSTATE_UINT32(mode, ssd0303_state), VMSTATE_UINT32(cmd_state, ssd0303_state), VMSTATE_BUFFER(framebuffer, ssd0303_state), - VMSTATE_I2C_SLAVE(i2c, ssd0303_state), + VMSTATE_I2C_SLAVE(parent_obj, ssd0303_state), VMSTATE_END_OF_LIST() } }; @@ -291,7 +297,7 @@ static const GraphicHwOps ssd0303_ops = { static int ssd0303_init(I2CSlave *i2c) { - ssd0303_state *s = FROM_I2C_SLAVE(ssd0303_state, i2c); + ssd0303_state *s = SSD0303(i2c); s->con = graphic_console_init(DEVICE(i2c), &ssd0303_ops, s); qemu_console_resize(s->con, 96 * MAGNIFY, 16 * MAGNIFY); @@ -311,7 +317,7 @@ static void ssd0303_class_init(ObjectClass *klass, void *data) } static const TypeInfo ssd0303_info = { - .name = "ssd0303", + .name = TYPE_SSD0303, .parent = TYPE_I2C_SLAVE, .instance_size = sizeof(ssd0303_state), .class_init = ssd0303_class_init, -- cgit v1.2.1 From b8bcf811bff0a5b9fb1e8663359d3cc175d93717 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Thu, 19 Dec 2013 22:21:57 +0100 Subject: max7310: QOM'ify MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Replace FROM_I2C_SLAVE() usages with QOM cast macro. Rename parent field. Reviewed-by: Peter Crosthwaite Signed-off-by: Andreas Färber --- hw/gpio/max7310.c | 23 ++++++++++++++--------- 1 file changed, 14 insertions(+), 9 deletions(-) (limited to 'hw') diff --git a/hw/gpio/max7310.c b/hw/gpio/max7310.c index 59b287703e..cfcd89ca2b 100644 --- a/hw/gpio/max7310.c +++ b/hw/gpio/max7310.c @@ -9,8 +9,12 @@ #include "hw/i2c/i2c.h" -typedef struct { - I2CSlave i2c; +#define TYPE_MAX7310 "max7310" +#define MAX7310(obj) OBJECT_CHECK(MAX7310State, (obj), TYPE_MAX7310) + +typedef struct MAX7310State { + I2CSlave parent_obj; + int i2c_command_byte; int len; @@ -25,7 +29,8 @@ typedef struct { static void max7310_reset(DeviceState *dev) { - MAX7310State *s = FROM_I2C_SLAVE(MAX7310State, I2C_SLAVE(dev)); + MAX7310State *s = MAX7310(dev); + s->level &= s->direction; s->direction = 0xff; s->polarity = 0xf0; @@ -35,7 +40,7 @@ static void max7310_reset(DeviceState *dev) static int max7310_rx(I2CSlave *i2c) { - MAX7310State *s = (MAX7310State *) i2c; + MAX7310State *s = MAX7310(i2c); switch (s->command) { case 0x00: /* Input port */ @@ -70,7 +75,7 @@ static int max7310_rx(I2CSlave *i2c) static int max7310_tx(I2CSlave *i2c, uint8_t data) { - MAX7310State *s = (MAX7310State *) i2c; + MAX7310State *s = MAX7310(i2c); uint8_t diff; int line; @@ -125,7 +130,7 @@ static int max7310_tx(I2CSlave *i2c, uint8_t data) static void max7310_event(I2CSlave *i2c, enum i2c_event event) { - MAX7310State *s = (MAX7310State *) i2c; + MAX7310State *s = MAX7310(i2c); s->len = 0; switch (event) { @@ -156,7 +161,7 @@ static const VMStateDescription vmstate_max7310 = { VMSTATE_UINT8(polarity, MAX7310State), VMSTATE_UINT8(status, MAX7310State), VMSTATE_UINT8(command, MAX7310State), - VMSTATE_I2C_SLAVE(i2c, MAX7310State), + VMSTATE_I2C_SLAVE(parent_obj, MAX7310State), VMSTATE_END_OF_LIST() } }; @@ -177,7 +182,7 @@ static void max7310_gpio_set(void *opaque, int line, int level) * but also accepts sequences that are not SMBus so return an I2C device. */ static int max7310_init(I2CSlave *i2c) { - MAX7310State *s = FROM_I2C_SLAVE(MAX7310State, i2c); + MAX7310State *s = MAX7310(i2c); qdev_init_gpio_in(&i2c->qdev, max7310_gpio_set, 8); qdev_init_gpio_out(&i2c->qdev, s->handler, 8); @@ -199,7 +204,7 @@ static void max7310_class_init(ObjectClass *klass, void *data) } static const TypeInfo max7310_info = { - .name = "max7310", + .name = TYPE_MAX7310, .parent = TYPE_I2C_SLAVE, .instance_size = sizeof(MAX7310State), .class_init = max7310_class_init, -- cgit v1.2.1 From 933069eb534ad37db67eb5b550798170fccbc64c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Thu, 19 Dec 2013 22:30:16 +0100 Subject: lm832x: QOM'ify MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Replace usages of FROM_I2C_SLAVE() and direct parent field accesses with QOM cast macro. Rename parent field. Reviewed-by: Peter Crosthwaite Signed-off-by: Andreas Färber --- hw/input/lm832x.c | 22 +++++++++++++--------- 1 file changed, 13 insertions(+), 9 deletions(-) (limited to 'hw') diff --git a/hw/input/lm832x.c b/hw/input/lm832x.c index f583cf0279..4ae1cd9c80 100644 --- a/hw/input/lm832x.c +++ b/hw/input/lm832x.c @@ -23,8 +23,12 @@ #include "qemu/timer.h" #include "ui/console.h" +#define TYPE_LM8323 "lm8323" +#define LM8323(obj) OBJECT_CHECK(LM823KbdState, (obj), TYPE_LM8323) + typedef struct { - I2CSlave i2c; + I2CSlave parent_obj; + uint8_t i2c_dir; uint8_t i2c_cycle; uint8_t reg; @@ -380,7 +384,7 @@ static void lm_kbd_write(LM823KbdState *s, int reg, int byte, uint8_t value) static void lm_i2c_event(I2CSlave *i2c, enum i2c_event event) { - LM823KbdState *s = FROM_I2C_SLAVE(LM823KbdState, i2c); + LM823KbdState *s = LM8323(i2c); switch (event) { case I2C_START_RECV: @@ -396,14 +400,14 @@ static void lm_i2c_event(I2CSlave *i2c, enum i2c_event event) static int lm_i2c_rx(I2CSlave *i2c) { - LM823KbdState *s = FROM_I2C_SLAVE(LM823KbdState, i2c); + LM823KbdState *s = LM8323(i2c); return lm_kbd_read(s, s->reg, s->i2c_cycle ++); } static int lm_i2c_tx(I2CSlave *i2c, uint8_t data) { - LM823KbdState *s = (LM823KbdState *) i2c; + LM823KbdState *s = LM8323(i2c); if (!s->i2c_cycle) s->reg = data; @@ -431,7 +435,7 @@ static const VMStateDescription vmstate_lm_kbd = { .minimum_version_id_old = 0, .post_load = lm_kbd_post_load, .fields = (VMStateField []) { - VMSTATE_I2C_SLAVE(i2c, LM823KbdState), + VMSTATE_I2C_SLAVE(parent_obj, LM823KbdState), VMSTATE_UINT8(i2c_dir, LM823KbdState), VMSTATE_UINT8(i2c_cycle, LM823KbdState), VMSTATE_UINT8(reg, LM823KbdState), @@ -460,13 +464,13 @@ static const VMStateDescription vmstate_lm_kbd = { static int lm8323_init(I2CSlave *i2c) { - LM823KbdState *s = FROM_I2C_SLAVE(LM823KbdState, i2c); + LM823KbdState *s = LM8323(i2c); s->model = 0x8323; s->pwm.tm[0] = timer_new_ns(QEMU_CLOCK_VIRTUAL, lm_kbd_pwm0_tick, s); s->pwm.tm[1] = timer_new_ns(QEMU_CLOCK_VIRTUAL, lm_kbd_pwm1_tick, s); s->pwm.tm[2] = timer_new_ns(QEMU_CLOCK_VIRTUAL, lm_kbd_pwm2_tick, s); - qdev_init_gpio_out(&i2c->qdev, &s->nirq, 1); + qdev_init_gpio_out(DEVICE(i2c), &s->nirq, 1); lm_kbd_reset(s); @@ -476,7 +480,7 @@ static int lm8323_init(I2CSlave *i2c) void lm832x_key_event(DeviceState *dev, int key, int state) { - LM823KbdState *s = FROM_I2C_SLAVE(LM823KbdState, I2C_SLAVE(dev)); + LM823KbdState *s = LM8323(dev); if ((s->status & INT_ERROR) && (s->error & ERR_FIFOOVR)) return; @@ -507,7 +511,7 @@ static void lm8323_class_init(ObjectClass *klass, void *data) } static const TypeInfo lm8323_info = { - .name = "lm8323", + .name = TYPE_LM8323, .parent = TYPE_I2C_SLAVE, .instance_size = sizeof(LM823KbdState), .class_init = lm8323_class_init, -- cgit v1.2.1 From 59ab56b9ad543f0290fbcc29a7fb2248b2920ef8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Thu, 19 Dec 2013 22:34:05 +0100 Subject: ds1338: QOM'ify MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Replace usages of FROM_I2C_SLAVE() with QOM cast macro. Rename parent field. Reviewed-by: Peter Crosthwaite Signed-off-by: Andreas Färber --- hw/timer/ds1338.c | 21 +++++++++++++-------- 1 file changed, 13 insertions(+), 8 deletions(-) (limited to 'hw') diff --git a/hw/timer/ds1338.c b/hw/timer/ds1338.c index 8987cdc9e0..bb2f8ee8b3 100644 --- a/hw/timer/ds1338.c +++ b/hw/timer/ds1338.c @@ -23,8 +23,12 @@ #define HOURS_PM 0x20 #define CTRL_OSF 0x20 -typedef struct { - I2CSlave i2c; +#define TYPE_DS1338 "ds1338" +#define DS1338(obj) OBJECT_CHECK(DS1338State, (obj), TYPE_DS1338) + +typedef struct DS1338State { + I2CSlave parent_obj; + int64_t offset; uint8_t wday_offset; uint8_t nvram[NVRAM_SIZE]; @@ -38,7 +42,7 @@ static const VMStateDescription vmstate_ds1338 = { .minimum_version_id = 1, .minimum_version_id_old = 1, .fields = (VMStateField[]) { - VMSTATE_I2C_SLAVE(i2c, DS1338State), + VMSTATE_I2C_SLAVE(parent_obj, DS1338State), VMSTATE_INT64(offset, DS1338State), VMSTATE_UINT8_V(wday_offset, DS1338State, 2), VMSTATE_UINT8_ARRAY(nvram, DS1338State, NVRAM_SIZE), @@ -90,7 +94,7 @@ static void inc_regptr(DS1338State *s) static void ds1338_event(I2CSlave *i2c, enum i2c_event event) { - DS1338State *s = FROM_I2C_SLAVE(DS1338State, i2c); + DS1338State *s = DS1338(i2c); switch (event) { case I2C_START_RECV: @@ -111,7 +115,7 @@ static void ds1338_event(I2CSlave *i2c, enum i2c_event event) static int ds1338_recv(I2CSlave *i2c) { - DS1338State *s = FROM_I2C_SLAVE(DS1338State, i2c); + DS1338State *s = DS1338(i2c); uint8_t res; res = s->nvram[s->ptr]; @@ -121,7 +125,8 @@ static int ds1338_recv(I2CSlave *i2c) static int ds1338_send(I2CSlave *i2c, uint8_t data) { - DS1338State *s = FROM_I2C_SLAVE(DS1338State, i2c); + DS1338State *s = DS1338(i2c); + if (s->addr_byte) { s->ptr = data & (NVRAM_SIZE - 1); s->addr_byte = false; @@ -198,7 +203,7 @@ static int ds1338_init(I2CSlave *i2c) static void ds1338_reset(DeviceState *dev) { - DS1338State *s = FROM_I2C_SLAVE(DS1338State, I2C_SLAVE(dev)); + DS1338State *s = DS1338(dev); /* The clock is running and synchronized with the host */ s->offset = 0; @@ -222,7 +227,7 @@ static void ds1338_class_init(ObjectClass *klass, void *data) } static const TypeInfo ds1338_info = { - .name = "ds1338", + .name = TYPE_DS1338, .parent = TYPE_I2C_SLAVE, .instance_size = sizeof(DS1338State), .class_init = ds1338_class_init, -- cgit v1.2.1 From dd37dfa9e73d0b13b98f28302a751d75660050a2 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Thu, 19 Dec 2013 22:41:25 +0100 Subject: twl92230: QOM'ify MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Replace usages of FROM_I2C_SLAVE() and direct parent field accesses with QOM cast macro. Rename parent field. Add missing braces while at it. Reviewed-by: Peter Crosthwaite Signed-off-by: Andreas Färber --- hw/timer/twl92230.c | 35 +++++++++++++++++++++-------------- 1 file changed, 21 insertions(+), 14 deletions(-) (limited to 'hw') diff --git a/hw/timer/twl92230.c b/hw/timer/twl92230.c index f3ea36503c..85d59909da 100644 --- a/hw/timer/twl92230.c +++ b/hw/timer/twl92230.c @@ -27,8 +27,11 @@ #define VERBOSE 1 -typedef struct { - I2CSlave i2c; +#define TYPE_TWL92230 "twl92230" +#define TWL92230(obj) OBJECT_CHECK(MenelausState, (obj), TYPE_TWL92230) + +typedef struct MenelausState { + I2CSlave parent_obj; int firstbyte; uint8_t reg; @@ -127,7 +130,8 @@ static void menelaus_rtc_hz(void *opaque) static void menelaus_reset(I2CSlave *i2c) { - MenelausState *s = (MenelausState *) i2c; + MenelausState *s = TWL92230(i2c); + s->reg = 0x00; s->vcore[0] = 0x0c; /* XXX: X-loader needs 0x8c? check! */ @@ -492,8 +496,9 @@ static void menelaus_write(void *opaque, uint8_t addr, uint8_t value) break; case MENELAUS_DEVICE_OFF: - if (value & 1) - menelaus_reset(&s->i2c); + if (value & 1) { + menelaus_reset(I2C_SLAVE(s)); + } break; case MENELAUS_OSC_CTRL: @@ -708,7 +713,7 @@ static void menelaus_write(void *opaque, uint8_t addr, uint8_t value) static void menelaus_event(I2CSlave *i2c, enum i2c_event event) { - MenelausState *s = (MenelausState *) i2c; + MenelausState *s = TWL92230(i2c); if (event == I2C_START_SEND) s->firstbyte = 1; @@ -716,7 +721,8 @@ static void menelaus_event(I2CSlave *i2c, enum i2c_event event) static int menelaus_tx(I2CSlave *i2c, uint8_t data) { - MenelausState *s = (MenelausState *) i2c; + MenelausState *s = TWL92230(i2c); + /* Interpret register address byte */ if (s->firstbyte) { s->reg = data; @@ -729,7 +735,7 @@ static int menelaus_tx(I2CSlave *i2c, uint8_t data) static int menelaus_rx(I2CSlave *i2c) { - MenelausState *s = (MenelausState *) i2c; + MenelausState *s = TWL92230(i2c); return menelaus_read(s, s->reg ++); } @@ -834,23 +840,24 @@ static const VMStateDescription vmstate_menelaus = { VMSTATE_STRUCT(rtc.alm, MenelausState, 0, vmstate_menelaus_tm, struct tm), VMSTATE_UINT8(pwrbtn_state, MenelausState), - VMSTATE_I2C_SLAVE(i2c, MenelausState), + VMSTATE_I2C_SLAVE(parent_obj, MenelausState), VMSTATE_END_OF_LIST() } }; static int twl92230_init(I2CSlave *i2c) { - MenelausState *s = FROM_I2C_SLAVE(MenelausState, i2c); + DeviceState *dev = DEVICE(i2c); + MenelausState *s = TWL92230(i2c); s->rtc.hz_tm = timer_new_ms(rtc_clock, menelaus_rtc_hz, s); /* Three output pins plus one interrupt pin. */ - qdev_init_gpio_out(&i2c->qdev, s->out, 4); + qdev_init_gpio_out(dev, s->out, 4); /* Three input pins plus one power-button pin. */ - qdev_init_gpio_in(&i2c->qdev, menelaus_gpio_set, 4); + qdev_init_gpio_in(dev, menelaus_gpio_set, 4); - menelaus_reset(&s->i2c); + menelaus_reset(i2c); return 0; } @@ -868,7 +875,7 @@ static void twl92230_class_init(ObjectClass *klass, void *data) } static const TypeInfo twl92230_info = { - .name = "twl92230", + .name = TYPE_TWL92230, .parent = TYPE_I2C_SLAVE, .instance_size = sizeof(MenelausState), .class_init = twl92230_class_init, -- cgit v1.2.1 From 5c570902559fbc113154e545c4b0749cd4318b1d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Thu, 1 Aug 2013 18:45:02 +0200 Subject: ipack: Convert to QOM realize MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Acked-by: Alberto Garcia Signed-off-by: Andreas Färber --- hw/char/ipack.c | 41 ++++++++++++++++++++++------------------- hw/char/ipack.h | 6 ++++-- hw/char/ipoctal232.c | 8 +++----- 3 files changed, 29 insertions(+), 26 deletions(-) (limited to 'hw') diff --git a/hw/char/ipack.c b/hw/char/ipack.c index b7e45bedb2..15cef7b9f9 100644 --- a/hw/char/ipack.c +++ b/hw/char/ipack.c @@ -34,37 +34,39 @@ void ipack_bus_new_inplace(IPackBus *bus, size_t bus_size, bus->set_irq = handler; } -static int ipack_device_dev_init(DeviceState *qdev) +static void ipack_device_realize(DeviceState *dev, Error **errp) { - IPackBus *bus = IPACK_BUS(qdev_get_parent_bus(qdev)); - IPackDevice *dev = IPACK_DEVICE(qdev); + IPackDevice *idev = IPACK_DEVICE(dev); + IPackBus *bus = IPACK_BUS(qdev_get_parent_bus(dev)); IPackDeviceClass *k = IPACK_DEVICE_GET_CLASS(dev); - if (dev->slot < 0) { - dev->slot = bus->free_slot; + if (idev->slot < 0) { + idev->slot = bus->free_slot; } - if (dev->slot >= bus->n_slots) { - return -1; + if (idev->slot >= bus->n_slots) { + error_setg(errp, "Only %" PRIu8 " slots available.", bus->n_slots); + return; } - bus->free_slot = dev->slot + 1; + bus->free_slot = idev->slot + 1; - dev->irq = qemu_allocate_irqs(bus->set_irq, dev, 2); + idev->irq = qemu_allocate_irqs(bus->set_irq, idev, 2); - return k->init(dev); + k->realize(dev, errp); } -static int ipack_device_dev_exit(DeviceState *qdev) +static void ipack_device_unrealize(DeviceState *dev, Error **errp) { - IPackDevice *dev = IPACK_DEVICE(qdev); + IPackDevice *idev = IPACK_DEVICE(dev); IPackDeviceClass *k = IPACK_DEVICE_GET_CLASS(dev); + Error *err = NULL; - if (k->exit) { - k->exit(dev); + if (k->unrealize) { + k->unrealize(dev, &err); + error_propagate(errp, err); + return; } - qemu_free_irqs(dev->irq); - - return 0; + qemu_free_irqs(idev->irq); } static Property ipack_device_props[] = { @@ -75,10 +77,11 @@ static Property ipack_device_props[] = { static void ipack_device_class_init(ObjectClass *klass, void *data) { DeviceClass *k = DEVICE_CLASS(klass); + set_bit(DEVICE_CATEGORY_INPUT, k->categories); k->bus_type = TYPE_IPACK_BUS; - k->init = ipack_device_dev_init; - k->exit = ipack_device_dev_exit; + k->realize = ipack_device_realize; + k->unrealize = ipack_device_unrealize; k->props = ipack_device_props; } diff --git a/hw/char/ipack.h b/hw/char/ipack.h index f8dc0f242a..b62066fca7 100644 --- a/hw/char/ipack.h +++ b/hw/char/ipack.h @@ -38,10 +38,12 @@ typedef struct IPackDeviceClass IPackDeviceClass; OBJECT_GET_CLASS(IPackDeviceClass, (obj), TYPE_IPACK_DEVICE) struct IPackDeviceClass { + /*< private >*/ DeviceClass parent_class; + /*< public >*/ - int (*init)(IPackDevice *dev); - int (*exit)(IPackDevice *dev); + DeviceRealize realize; + DeviceUnrealize unrealize; uint16_t (*io_read)(IPackDevice *dev, uint8_t addr); void (*io_write)(IPackDevice *dev, uint8_t addr, uint16_t val); diff --git a/hw/char/ipoctal232.c b/hw/char/ipoctal232.c index 88e2ccae75..b33cfff6e8 100644 --- a/hw/char/ipoctal232.c +++ b/hw/char/ipoctal232.c @@ -534,9 +534,9 @@ static void hostdev_event(void *opaque, int event) } } -static int ipoctal_init(IPackDevice *ip) +static void ipoctal_realize(DeviceState *dev, Error **errp) { - IPOctalState *s = IPOCTAL(ip); + IPOctalState *s = IPOCTAL(dev); unsigned i; for (i = 0; i < N_CHANNELS; i++) { @@ -552,8 +552,6 @@ static int ipoctal_init(IPackDevice *ip) DPRINTF("Could not redirect channel %u, no chardev set\n", i); } } - - return 0; } static Property ipoctal_properties[] = { @@ -573,7 +571,7 @@ static void ipoctal_class_init(ObjectClass *klass, void *data) DeviceClass *dc = DEVICE_CLASS(klass); IPackDeviceClass *ic = IPACK_DEVICE_CLASS(klass); - ic->init = ipoctal_init; + ic->realize = ipoctal_realize; ic->io_read = io_read; ic->io_write = io_write; ic->id_read = id_read; -- cgit v1.2.1 From a21ac343d10141803483ec1097b2f1c3b3b4bd42 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Thu, 1 Aug 2013 18:47:34 +0200 Subject: ipack: QOM parent field cleanup for IPackBus MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Clean up the only user of IPackBus::qbus field and rename it. Acked-by: Alberto Garcia Signed-off-by: Andreas Färber --- hw/char/ipack.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'hw') diff --git a/hw/char/ipack.h b/hw/char/ipack.h index b62066fca7..a386b88baf 100644 --- a/hw/char/ipack.h +++ b/hw/char/ipack.h @@ -19,7 +19,9 @@ typedef struct IPackBus IPackBus; #define IPACK_BUS(obj) OBJECT_CHECK(IPackBus, (obj), TYPE_IPACK_BUS) struct IPackBus { - BusState qbus; + /*< private >*/ + BusState parent_obj; + /* All fields are private */ uint8_t n_slots; uint8_t free_slot; -- cgit v1.2.1 From 227d32725216723ffa99f0eb43c97f933e1da5b4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Thu, 1 Aug 2013 18:48:28 +0200 Subject: ipack: QOM parent field cleanup for IPackDevice MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Rename the IPackDevice::qdev field to avoid accidental use. Acked-by: Alberto Garcia Signed-off-by: Andreas Färber --- hw/char/ipack.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'hw') diff --git a/hw/char/ipack.h b/hw/char/ipack.h index a386b88baf..e95ffe820d 100644 --- a/hw/char/ipack.h +++ b/hw/char/ipack.h @@ -64,7 +64,10 @@ struct IPackDeviceClass { }; struct IPackDevice { - DeviceState qdev; + /*< private >*/ + DeviceState parent_obj; + /*< public >*/ + int32_t slot; /* IRQ objects for the IndustryPack INT0# and INT1# */ qemu_irq *irq; -- cgit v1.2.1 From 08c9cacf0e965562cbf5bf44067b0bd4863e250f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Thu, 1 Aug 2013 18:51:35 +0200 Subject: ipoctal232: QOM parent field cleanup MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Clean up accesses to IPOctalState::dev field and rename it. Acked-by: Alberto Garcia Signed-off-by: Andreas Färber --- hw/char/ipoctal232.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) (limited to 'hw') diff --git a/hw/char/ipoctal232.c b/hw/char/ipoctal232.c index b33cfff6e8..99bab4dd83 100644 --- a/hw/char/ipoctal232.c +++ b/hw/char/ipoctal232.c @@ -108,7 +108,8 @@ struct SCC2698Block { }; struct IPOctalState { - IPackDevice dev; + IPackDevice parent_obj; + SCC2698Channel ch[N_CHANNELS]; SCC2698Block blk[N_BLOCKS]; uint8_t irq_vector; @@ -154,7 +155,7 @@ static const VMStateDescription vmstate_ipoctal = { .minimum_version_id = 1, .minimum_version_id_old = 1, .fields = (VMStateField[]) { - VMSTATE_IPACK_DEVICE(dev, IPOctalState), + VMSTATE_IPACK_DEVICE(parent_obj, IPOctalState), VMSTATE_STRUCT_ARRAY(ch, IPOctalState, N_CHANNELS, 1, vmstate_scc2698_channel, SCC2698Channel), VMSTATE_STRUCT_ARRAY(blk, IPOctalState, N_BLOCKS, 1, @@ -172,6 +173,7 @@ static const uint8_t id_prom_data[] = { static void update_irq(IPOctalState *dev, unsigned block) { + IPackDevice *idev = IPACK_DEVICE(dev); /* Blocks A and B interrupt on INT0#, C and D on INT1#. Thus, to get the status we have to check two blocks. */ SCC2698Block *blk0 = &dev->blk[block]; @@ -179,9 +181,9 @@ static void update_irq(IPOctalState *dev, unsigned block) unsigned intno = block / 2; if ((blk0->isr & blk0->imr) || (blk1->isr & blk1->imr)) { - qemu_irq_raise(dev->dev.irq[intno]); + qemu_irq_raise(idev->irq[intno]); } else { - qemu_irq_lower(dev->dev.irq[intno]); + qemu_irq_lower(idev->irq[intno]); } } -- cgit v1.2.1 From 1f9c4cfda4df7c442255f9492a2408d80df1d42a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Fri, 2 Aug 2013 00:48:40 +0200 Subject: ipack: Move IndustryPack out of hw/char/ MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Move the header defining an IPackBus and IPackDevice base class into a new include/ directory and move their implementation and a PCI-IndustryPack bridge out of hw/char/ directory into a new hw/ipack/. Acked-by: Alberto Garcia Signed-off-by: Andreas Färber --- hw/Makefile.objs | 1 + hw/char/Makefile.objs | 2 +- hw/char/ipack.c | 120 --------- hw/char/ipack.h | 87 ------- hw/char/ipoctal232.c | 2 +- hw/char/tpci200.c | 672 ------------------------------------------------- hw/ipack/Makefile.objs | 2 + hw/ipack/ipack.c | 120 +++++++++ hw/ipack/tpci200.c | 672 +++++++++++++++++++++++++++++++++++++++++++++++++ 9 files changed, 797 insertions(+), 881 deletions(-) delete mode 100644 hw/char/ipack.c delete mode 100644 hw/char/ipack.h delete mode 100644 hw/char/tpci200.c create mode 100644 hw/ipack/Makefile.objs create mode 100644 hw/ipack/ipack.c create mode 100644 hw/ipack/tpci200.c (limited to 'hw') diff --git a/hw/Makefile.objs b/hw/Makefile.objs index d91b9cc6c6..05a00dc401 100644 --- a/hw/Makefile.objs +++ b/hw/Makefile.objs @@ -12,6 +12,7 @@ devices-dirs-$(CONFIG_SOFTMMU) += i2c/ devices-dirs-$(CONFIG_SOFTMMU) += ide/ devices-dirs-$(CONFIG_SOFTMMU) += input/ devices-dirs-$(CONFIG_SOFTMMU) += intc/ +devices-dirs-$(CONFIG_IPACK) += ipack/ devices-dirs-$(CONFIG_SOFTMMU) += isa/ devices-dirs-$(CONFIG_SOFTMMU) += misc/ devices-dirs-$(CONFIG_SOFTMMU) += net/ diff --git a/hw/char/Makefile.objs b/hw/char/Makefile.objs index be2a7d953a..317385d26f 100644 --- a/hw/char/Makefile.objs +++ b/hw/char/Makefile.objs @@ -1,4 +1,4 @@ -common-obj-$(CONFIG_IPACK) += tpci200.o ipoctal232.o ipack.o +common-obj-$(CONFIG_IPACK) += ipoctal232.o common-obj-$(CONFIG_ESCC) += escc.o common-obj-$(CONFIG_PARALLEL) += parallel.o common-obj-$(CONFIG_PL011) += pl011.o diff --git a/hw/char/ipack.c b/hw/char/ipack.c deleted file mode 100644 index 15cef7b9f9..0000000000 --- a/hw/char/ipack.c +++ /dev/null @@ -1,120 +0,0 @@ -/* - * QEMU IndustryPack emulation - * - * Copyright (C) 2012 Igalia, S.L. - * Author: Alberto Garcia - * - * This code is licensed under the GNU GPL v2 or (at your option) any - * later version. - */ - -#include "ipack.h" - -IPackDevice *ipack_device_find(IPackBus *bus, int32_t slot) -{ - BusChild *kid; - - QTAILQ_FOREACH(kid, &BUS(bus)->children, sibling) { - DeviceState *qdev = kid->child; - IPackDevice *ip = IPACK_DEVICE(qdev); - if (ip->slot == slot) { - return ip; - } - } - return NULL; -} - -void ipack_bus_new_inplace(IPackBus *bus, size_t bus_size, - DeviceState *parent, - const char *name, uint8_t n_slots, - qemu_irq_handler handler) -{ - qbus_create_inplace(bus, bus_size, TYPE_IPACK_BUS, parent, name); - bus->n_slots = n_slots; - bus->set_irq = handler; -} - -static void ipack_device_realize(DeviceState *dev, Error **errp) -{ - IPackDevice *idev = IPACK_DEVICE(dev); - IPackBus *bus = IPACK_BUS(qdev_get_parent_bus(dev)); - IPackDeviceClass *k = IPACK_DEVICE_GET_CLASS(dev); - - if (idev->slot < 0) { - idev->slot = bus->free_slot; - } - if (idev->slot >= bus->n_slots) { - error_setg(errp, "Only %" PRIu8 " slots available.", bus->n_slots); - return; - } - bus->free_slot = idev->slot + 1; - - idev->irq = qemu_allocate_irqs(bus->set_irq, idev, 2); - - k->realize(dev, errp); -} - -static void ipack_device_unrealize(DeviceState *dev, Error **errp) -{ - IPackDevice *idev = IPACK_DEVICE(dev); - IPackDeviceClass *k = IPACK_DEVICE_GET_CLASS(dev); - Error *err = NULL; - - if (k->unrealize) { - k->unrealize(dev, &err); - error_propagate(errp, err); - return; - } - - qemu_free_irqs(idev->irq); -} - -static Property ipack_device_props[] = { - DEFINE_PROP_INT32("slot", IPackDevice, slot, -1), - DEFINE_PROP_END_OF_LIST() -}; - -static void ipack_device_class_init(ObjectClass *klass, void *data) -{ - DeviceClass *k = DEVICE_CLASS(klass); - - set_bit(DEVICE_CATEGORY_INPUT, k->categories); - k->bus_type = TYPE_IPACK_BUS; - k->realize = ipack_device_realize; - k->unrealize = ipack_device_unrealize; - k->props = ipack_device_props; -} - -const VMStateDescription vmstate_ipack_device = { - .name = "ipack_device", - .version_id = 1, - .minimum_version_id = 1, - .minimum_version_id_old = 1, - .fields = (VMStateField[]) { - VMSTATE_INT32(slot, IPackDevice), - VMSTATE_END_OF_LIST() - } -}; - -static const TypeInfo ipack_device_info = { - .name = TYPE_IPACK_DEVICE, - .parent = TYPE_DEVICE, - .instance_size = sizeof(IPackDevice), - .class_size = sizeof(IPackDeviceClass), - .class_init = ipack_device_class_init, - .abstract = true, -}; - -static const TypeInfo ipack_bus_info = { - .name = TYPE_IPACK_BUS, - .parent = TYPE_BUS, - .instance_size = sizeof(IPackBus), -}; - -static void ipack_register_types(void) -{ - type_register_static(&ipack_device_info); - type_register_static(&ipack_bus_info); -} - -type_init(ipack_register_types) diff --git a/hw/char/ipack.h b/hw/char/ipack.h deleted file mode 100644 index e95ffe820d..0000000000 --- a/hw/char/ipack.h +++ /dev/null @@ -1,87 +0,0 @@ -/* - * QEMU IndustryPack emulation - * - * Copyright (C) 2012 Igalia, S.L. - * Author: Alberto Garcia - * - * This code is licensed under the GNU GPL v2 or (at your option) any - * later version. - */ - -#ifndef QEMU_IPACK_H -#define QEMU_IPACK_H - -#include "hw/qdev.h" - -typedef struct IPackBus IPackBus; - -#define TYPE_IPACK_BUS "IndustryPack" -#define IPACK_BUS(obj) OBJECT_CHECK(IPackBus, (obj), TYPE_IPACK_BUS) - -struct IPackBus { - /*< private >*/ - BusState parent_obj; - - /* All fields are private */ - uint8_t n_slots; - uint8_t free_slot; - qemu_irq_handler set_irq; -}; - -typedef struct IPackDevice IPackDevice; -typedef struct IPackDeviceClass IPackDeviceClass; - -#define TYPE_IPACK_DEVICE "ipack-device" -#define IPACK_DEVICE(obj) \ - OBJECT_CHECK(IPackDevice, (obj), TYPE_IPACK_DEVICE) -#define IPACK_DEVICE_CLASS(klass) \ - OBJECT_CLASS_CHECK(IPackDeviceClass, (klass), TYPE_IPACK_DEVICE) -#define IPACK_DEVICE_GET_CLASS(obj) \ - OBJECT_GET_CLASS(IPackDeviceClass, (obj), TYPE_IPACK_DEVICE) - -struct IPackDeviceClass { - /*< private >*/ - DeviceClass parent_class; - /*< public >*/ - - DeviceRealize realize; - DeviceUnrealize unrealize; - - uint16_t (*io_read)(IPackDevice *dev, uint8_t addr); - void (*io_write)(IPackDevice *dev, uint8_t addr, uint16_t val); - - uint16_t (*id_read)(IPackDevice *dev, uint8_t addr); - void (*id_write)(IPackDevice *dev, uint8_t addr, uint16_t val); - - uint16_t (*int_read)(IPackDevice *dev, uint8_t addr); - void (*int_write)(IPackDevice *dev, uint8_t addr, uint16_t val); - - uint16_t (*mem_read16)(IPackDevice *dev, uint32_t addr); - void (*mem_write16)(IPackDevice *dev, uint32_t addr, uint16_t val); - - uint8_t (*mem_read8)(IPackDevice *dev, uint32_t addr); - void (*mem_write8)(IPackDevice *dev, uint32_t addr, uint8_t val); -}; - -struct IPackDevice { - /*< private >*/ - DeviceState parent_obj; - /*< public >*/ - - int32_t slot; - /* IRQ objects for the IndustryPack INT0# and INT1# */ - qemu_irq *irq; -}; - -extern const VMStateDescription vmstate_ipack_device; - -#define VMSTATE_IPACK_DEVICE(_field, _state) \ - VMSTATE_STRUCT(_field, _state, 1, vmstate_ipack_device, IPackDevice) - -IPackDevice *ipack_device_find(IPackBus *bus, int32_t slot); -void ipack_bus_new_inplace(IPackBus *bus, size_t bus_size, - DeviceState *parent, - const char *name, uint8_t n_slots, - qemu_irq_handler handler); - -#endif diff --git a/hw/char/ipoctal232.c b/hw/char/ipoctal232.c index 99bab4dd83..f9c388ed0b 100644 --- a/hw/char/ipoctal232.c +++ b/hw/char/ipoctal232.c @@ -8,7 +8,7 @@ * later version. */ -#include "ipack.h" +#include "hw/ipack/ipack.h" #include "qemu/bitops.h" #include "sysemu/char.h" diff --git a/hw/char/tpci200.c b/hw/char/tpci200.c deleted file mode 100644 index a49d2ed5c1..0000000000 --- a/hw/char/tpci200.c +++ /dev/null @@ -1,672 +0,0 @@ -/* - * QEMU TEWS TPCI200 IndustryPack carrier emulation - * - * Copyright (C) 2012 Igalia, S.L. - * Author: Alberto Garcia - * - * This code is licensed under the GNU GPL v2 or (at your option) any - * later version. - */ - -#include "ipack.h" -#include "hw/pci/pci.h" -#include "qemu/bitops.h" -#include - -/* #define DEBUG_TPCI */ - -#ifdef DEBUG_TPCI -#define DPRINTF(fmt, ...) \ - do { fprintf(stderr, "TPCI200: " fmt, ## __VA_ARGS__); } while (0) -#else -#define DPRINTF(fmt, ...) do { } while (0) -#endif - -#define N_MODULES 4 - -#define IP_ID_SPACE 2 -#define IP_INT_SPACE 3 -#define IP_IO_SPACE_ADDR_MASK 0x7F -#define IP_ID_SPACE_ADDR_MASK 0x3F -#define IP_INT_SPACE_ADDR_MASK 0x3F - -#define STATUS_INT(IP, INTNO) BIT((IP) * 2 + (INTNO)) -#define STATUS_TIME(IP) BIT((IP) + 12) -#define STATUS_ERR_ANY 0xF00 - -#define CTRL_CLKRATE BIT(0) -#define CTRL_RECOVER BIT(1) -#define CTRL_TIME_INT BIT(2) -#define CTRL_ERR_INT BIT(3) -#define CTRL_INT_EDGE(INTNO) BIT(4 + (INTNO)) -#define CTRL_INT(INTNO) BIT(6 + (INTNO)) - -#define REG_REV_ID 0x00 -#define REG_IP_A_CTRL 0x02 -#define REG_IP_B_CTRL 0x04 -#define REG_IP_C_CTRL 0x06 -#define REG_IP_D_CTRL 0x08 -#define REG_RESET 0x0A -#define REG_STATUS 0x0C -#define IP_N_FROM_REG(REG) ((REG) / 2 - 1) - -typedef struct { - PCIDevice dev; - IPackBus bus; - MemoryRegion mmio; - MemoryRegion io; - MemoryRegion las0; - MemoryRegion las1; - MemoryRegion las2; - MemoryRegion las3; - bool big_endian[3]; - uint8_t ctrl[N_MODULES]; - uint16_t status; - uint8_t int_set; -} TPCI200State; - -#define TYPE_TPCI200 "tpci200" - -#define TPCI200(obj) \ - OBJECT_CHECK(TPCI200State, (obj), TYPE_TPCI200) - -static const uint8_t local_config_regs[] = { - 0x00, 0xFF, 0xFF, 0x0F, 0x00, 0xFC, 0xFF, 0x0F, 0x00, 0x00, 0x00, - 0x0E, 0x00, 0x00, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, - 0x00, 0x08, 0x01, 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x00, 0x01, - 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0x60, 0x41, 0xD4, - 0xA2, 0x20, 0x41, 0x14, 0xA2, 0x20, 0x41, 0x14, 0xA2, 0x20, 0x01, - 0x14, 0x00, 0x00, 0x00, 0x00, 0x81, 0x00, 0x00, 0x08, 0x01, 0x02, - 0x00, 0x04, 0x01, 0x00, 0x00, 0x01, 0x01, 0x00, 0x80, 0x02, 0x41, - 0x00, 0x00, 0x00, 0x00, 0x40, 0x7A, 0x00, 0x52, 0x92, 0x24, 0x02 -}; - -static void adjust_addr(bool big_endian, hwaddr *addr, unsigned size) -{ - /* During 8 bit access in big endian mode, - odd and even addresses are swapped */ - if (big_endian && size == 1) { - *addr ^= 1; - } -} - -static uint64_t adjust_value(bool big_endian, uint64_t *val, unsigned size) -{ - /* Local spaces only support 8/16 bit access, - * so there's no need to care for sizes > 2 */ - if (big_endian && size == 2) { - *val = bswap16(*val); - } - return *val; -} - -static void tpci200_set_irq(void *opaque, int intno, int level) -{ - IPackDevice *ip = opaque; - IPackBus *bus = IPACK_BUS(qdev_get_parent_bus(DEVICE(ip))); - PCIDevice *pcidev = PCI_DEVICE(BUS(bus)->parent); - TPCI200State *dev = TPCI200(pcidev); - unsigned ip_n = ip->slot; - uint16_t prev_status = dev->status; - - assert(ip->slot >= 0 && ip->slot < N_MODULES); - - /* The requested interrupt must be enabled in the IP CONTROL - * register */ - if (!(dev->ctrl[ip_n] & CTRL_INT(intno))) { - return; - } - - /* Update the interrupt status in the IP STATUS register */ - if (level) { - dev->status |= STATUS_INT(ip_n, intno); - } else { - dev->status &= ~STATUS_INT(ip_n, intno); - } - - /* Return if there are no changes */ - if (dev->status == prev_status) { - return; - } - - DPRINTF("IP %u INT%u#: %u\n", ip_n, intno, level); - - /* Check if the interrupt is edge sensitive */ - if (dev->ctrl[ip_n] & CTRL_INT_EDGE(intno)) { - if (level) { - pci_set_irq(&dev->dev, !dev->int_set); - pci_set_irq(&dev->dev, dev->int_set); - } - } else { - unsigned i, j; - uint16_t level_status = dev->status; - - /* Check if there are any level sensitive interrupts set by - removing the ones that are edge sensitive from the status - register */ - for (i = 0; i < N_MODULES; i++) { - for (j = 0; j < 2; j++) { - if (dev->ctrl[i] & CTRL_INT_EDGE(j)) { - level_status &= ~STATUS_INT(i, j); - } - } - } - - if (level_status && !dev->int_set) { - pci_irq_assert(&dev->dev); - dev->int_set = 1; - } else if (!level_status && dev->int_set) { - pci_irq_deassert(&dev->dev); - dev->int_set = 0; - } - } -} - -static uint64_t tpci200_read_cfg(void *opaque, hwaddr addr, unsigned size) -{ - TPCI200State *s = opaque; - uint8_t ret = 0; - if (addr < ARRAY_SIZE(local_config_regs)) { - ret = local_config_regs[addr]; - } - /* Endianness is stored in the first bit of these registers */ - if ((addr == 0x2b && s->big_endian[0]) || - (addr == 0x2f && s->big_endian[1]) || - (addr == 0x33 && s->big_endian[2])) { - ret |= 1; - } - DPRINTF("Read from LCR 0x%x: 0x%x\n", (unsigned) addr, (unsigned) ret); - return ret; -} - -static void tpci200_write_cfg(void *opaque, hwaddr addr, uint64_t val, - unsigned size) -{ - TPCI200State *s = opaque; - /* Endianness is stored in the first bit of these registers */ - if (addr == 0x2b || addr == 0x2f || addr == 0x33) { - unsigned las = (addr - 0x2b) / 4; - s->big_endian[las] = val & 1; - DPRINTF("LAS%u big endian mode: %u\n", las, (unsigned) val & 1); - } else { - DPRINTF("Write to LCR 0x%x: 0x%x\n", (unsigned) addr, (unsigned) val); - } -} - -static uint64_t tpci200_read_las0(void *opaque, hwaddr addr, unsigned size) -{ - TPCI200State *s = opaque; - uint64_t ret = 0; - - switch (addr) { - - case REG_REV_ID: - DPRINTF("Read REVISION ID\n"); /* Current value is 0x00 */ - break; - - case REG_IP_A_CTRL: - case REG_IP_B_CTRL: - case REG_IP_C_CTRL: - case REG_IP_D_CTRL: - { - unsigned ip_n = IP_N_FROM_REG(addr); - ret = s->ctrl[ip_n]; - DPRINTF("Read IP %c CONTROL: 0x%x\n", 'A' + ip_n, (unsigned) ret); - } - break; - - case REG_RESET: - DPRINTF("Read RESET\n"); /* Not implemented */ - break; - - case REG_STATUS: - ret = s->status; - DPRINTF("Read STATUS: 0x%x\n", (unsigned) ret); - break; - - /* Reserved */ - default: - DPRINTF("Unsupported read from LAS0 0x%x\n", (unsigned) addr); - break; - } - - return adjust_value(s->big_endian[0], &ret, size); -} - -static void tpci200_write_las0(void *opaque, hwaddr addr, uint64_t val, - unsigned size) -{ - TPCI200State *s = opaque; - - adjust_value(s->big_endian[0], &val, size); - - switch (addr) { - - case REG_REV_ID: - DPRINTF("Write Revision ID: 0x%x\n", (unsigned) val); /* No effect */ - break; - - case REG_IP_A_CTRL: - case REG_IP_B_CTRL: - case REG_IP_C_CTRL: - case REG_IP_D_CTRL: - { - unsigned ip_n = IP_N_FROM_REG(addr); - s->ctrl[ip_n] = val; - DPRINTF("Write IP %c CONTROL: 0x%x\n", 'A' + ip_n, (unsigned) val); - } - break; - - case REG_RESET: - DPRINTF("Write RESET: 0x%x\n", (unsigned) val); /* Not implemented */ - break; - - case REG_STATUS: - { - unsigned i; - - for (i = 0; i < N_MODULES; i++) { - IPackDevice *ip = ipack_device_find(&s->bus, i); - - if (ip != NULL) { - if (val & STATUS_INT(i, 0)) { - DPRINTF("Clear IP %c INT0# status\n", 'A' + i); - qemu_irq_lower(ip->irq[0]); - } - if (val & STATUS_INT(i, 1)) { - DPRINTF("Clear IP %c INT1# status\n", 'A' + i); - qemu_irq_lower(ip->irq[1]); - } - } - - if (val & STATUS_TIME(i)) { - DPRINTF("Clear IP %c timeout\n", 'A' + i); - s->status &= ~STATUS_TIME(i); - } - } - - if (val & STATUS_ERR_ANY) { - DPRINTF("Unexpected write to STATUS register: 0x%x\n", - (unsigned) val); - } - } - break; - - /* Reserved */ - default: - DPRINTF("Unsupported write to LAS0 0x%x: 0x%x\n", - (unsigned) addr, (unsigned) val); - break; - } -} - -static uint64_t tpci200_read_las1(void *opaque, hwaddr addr, unsigned size) -{ - TPCI200State *s = opaque; - IPackDevice *ip; - uint64_t ret = 0; - unsigned ip_n, space; - uint8_t offset; - - adjust_addr(s->big_endian[1], &addr, size); - - /* - * The address is divided into the IP module number (0-4), the IP - * address space (I/O, ID, INT) and the offset within that space. - */ - ip_n = addr >> 8; - space = (addr >> 6) & 3; - ip = ipack_device_find(&s->bus, ip_n); - - if (ip == NULL) { - DPRINTF("Read LAS1: IP module %u not installed\n", ip_n); - } else { - IPackDeviceClass *k = IPACK_DEVICE_GET_CLASS(ip); - switch (space) { - - case IP_ID_SPACE: - offset = addr & IP_ID_SPACE_ADDR_MASK; - if (k->id_read) { - ret = k->id_read(ip, offset); - } - break; - - case IP_INT_SPACE: - offset = addr & IP_INT_SPACE_ADDR_MASK; - - /* Read address 0 to ACK IP INT0# and address 2 to ACK IP INT1# */ - if (offset == 0 || offset == 2) { - unsigned intno = offset / 2; - bool int_set = s->status & STATUS_INT(ip_n, intno); - bool int_edge_sensitive = s->ctrl[ip_n] & CTRL_INT_EDGE(intno); - if (int_set && !int_edge_sensitive) { - qemu_irq_lower(ip->irq[intno]); - } - } - - if (k->int_read) { - ret = k->int_read(ip, offset); - } - break; - - default: - offset = addr & IP_IO_SPACE_ADDR_MASK; - if (k->io_read) { - ret = k->io_read(ip, offset); - } - break; - } - } - - return adjust_value(s->big_endian[1], &ret, size); -} - -static void tpci200_write_las1(void *opaque, hwaddr addr, uint64_t val, - unsigned size) -{ - TPCI200State *s = opaque; - IPackDevice *ip; - unsigned ip_n, space; - uint8_t offset; - - adjust_addr(s->big_endian[1], &addr, size); - adjust_value(s->big_endian[1], &val, size); - - /* - * The address is divided into the IP module number, the IP - * address space (I/O, ID, INT) and the offset within that space. - */ - ip_n = addr >> 8; - space = (addr >> 6) & 3; - ip = ipack_device_find(&s->bus, ip_n); - - if (ip == NULL) { - DPRINTF("Write LAS1: IP module %u not installed\n", ip_n); - } else { - IPackDeviceClass *k = IPACK_DEVICE_GET_CLASS(ip); - switch (space) { - - case IP_ID_SPACE: - offset = addr & IP_ID_SPACE_ADDR_MASK; - if (k->id_write) { - k->id_write(ip, offset, val); - } - break; - - case IP_INT_SPACE: - offset = addr & IP_INT_SPACE_ADDR_MASK; - if (k->int_write) { - k->int_write(ip, offset, val); - } - break; - - default: - offset = addr & IP_IO_SPACE_ADDR_MASK; - if (k->io_write) { - k->io_write(ip, offset, val); - } - break; - } - } -} - -static uint64_t tpci200_read_las2(void *opaque, hwaddr addr, unsigned size) -{ - TPCI200State *s = opaque; - IPackDevice *ip; - uint64_t ret = 0; - unsigned ip_n; - uint32_t offset; - - adjust_addr(s->big_endian[2], &addr, size); - - /* - * The address is divided into the IP module number and the offset - * within the IP module MEM space. - */ - ip_n = addr >> 23; - offset = addr & 0x7fffff; - ip = ipack_device_find(&s->bus, ip_n); - - if (ip == NULL) { - DPRINTF("Read LAS2: IP module %u not installed\n", ip_n); - } else { - IPackDeviceClass *k = IPACK_DEVICE_GET_CLASS(ip); - if (k->mem_read16) { - ret = k->mem_read16(ip, offset); - } - } - - return adjust_value(s->big_endian[2], &ret, size); -} - -static void tpci200_write_las2(void *opaque, hwaddr addr, uint64_t val, - unsigned size) -{ - TPCI200State *s = opaque; - IPackDevice *ip; - unsigned ip_n; - uint32_t offset; - - adjust_addr(s->big_endian[2], &addr, size); - adjust_value(s->big_endian[2], &val, size); - - /* - * The address is divided into the IP module number and the offset - * within the IP module MEM space. - */ - ip_n = addr >> 23; - offset = addr & 0x7fffff; - ip = ipack_device_find(&s->bus, ip_n); - - if (ip == NULL) { - DPRINTF("Write LAS2: IP module %u not installed\n", ip_n); - } else { - IPackDeviceClass *k = IPACK_DEVICE_GET_CLASS(ip); - if (k->mem_write16) { - k->mem_write16(ip, offset, val); - } - } -} - -static uint64_t tpci200_read_las3(void *opaque, hwaddr addr, unsigned size) -{ - TPCI200State *s = opaque; - IPackDevice *ip; - uint64_t ret = 0; - /* - * The address is divided into the IP module number and the offset - * within the IP module MEM space. - */ - unsigned ip_n = addr >> 22; - uint32_t offset = addr & 0x3fffff; - - ip = ipack_device_find(&s->bus, ip_n); - - if (ip == NULL) { - DPRINTF("Read LAS3: IP module %u not installed\n", ip_n); - } else { - IPackDeviceClass *k = IPACK_DEVICE_GET_CLASS(ip); - if (k->mem_read8) { - ret = k->mem_read8(ip, offset); - } - } - - return ret; -} - -static void tpci200_write_las3(void *opaque, hwaddr addr, uint64_t val, - unsigned size) -{ - TPCI200State *s = opaque; - IPackDevice *ip; - /* - * The address is divided into the IP module number and the offset - * within the IP module MEM space. - */ - unsigned ip_n = addr >> 22; - uint32_t offset = addr & 0x3fffff; - - ip = ipack_device_find(&s->bus, ip_n); - - if (ip == NULL) { - DPRINTF("Write LAS3: IP module %u not installed\n", ip_n); - } else { - IPackDeviceClass *k = IPACK_DEVICE_GET_CLASS(ip); - if (k->mem_write8) { - k->mem_write8(ip, offset, val); - } - } -} - -static const MemoryRegionOps tpci200_cfg_ops = { - .read = tpci200_read_cfg, - .write = tpci200_write_cfg, - .endianness = DEVICE_NATIVE_ENDIAN, - .valid = { - .min_access_size = 1, - .max_access_size = 4 - }, - .impl = { - .min_access_size = 1, - .max_access_size = 1 - } -}; - -static const MemoryRegionOps tpci200_las0_ops = { - .read = tpci200_read_las0, - .write = tpci200_write_las0, - .endianness = DEVICE_NATIVE_ENDIAN, - .valid = { - .min_access_size = 2, - .max_access_size = 2 - } -}; - -static const MemoryRegionOps tpci200_las1_ops = { - .read = tpci200_read_las1, - .write = tpci200_write_las1, - .endianness = DEVICE_NATIVE_ENDIAN, - .valid = { - .min_access_size = 1, - .max_access_size = 2 - } -}; - -static const MemoryRegionOps tpci200_las2_ops = { - .read = tpci200_read_las2, - .write = tpci200_write_las2, - .endianness = DEVICE_NATIVE_ENDIAN, - .valid = { - .min_access_size = 1, - .max_access_size = 2 - } -}; - -static const MemoryRegionOps tpci200_las3_ops = { - .read = tpci200_read_las3, - .write = tpci200_write_las3, - .endianness = DEVICE_NATIVE_ENDIAN, - .valid = { - .min_access_size = 1, - .max_access_size = 1 - } -}; - -static int tpci200_initfn(PCIDevice *pci_dev) -{ - TPCI200State *s = TPCI200(pci_dev); - uint8_t *c = s->dev.config; - - pci_set_word(c + PCI_COMMAND, 0x0003); - pci_set_word(c + PCI_STATUS, 0x0280); - - pci_set_byte(c + PCI_INTERRUPT_PIN, 0x01); /* Interrupt pin A */ - - pci_set_byte(c + PCI_CAPABILITY_LIST, 0x40); - pci_set_long(c + 0x40, 0x48014801); - pci_set_long(c + 0x48, 0x00024C06); - pci_set_long(c + 0x4C, 0x00000003); - - memory_region_init_io(&s->mmio, OBJECT(s), &tpci200_cfg_ops, - s, "tpci200_mmio", 128); - memory_region_init_io(&s->io, OBJECT(s), &tpci200_cfg_ops, - s, "tpci200_io", 128); - memory_region_init_io(&s->las0, OBJECT(s), &tpci200_las0_ops, - s, "tpci200_las0", 256); - memory_region_init_io(&s->las1, OBJECT(s), &tpci200_las1_ops, - s, "tpci200_las1", 1024); - memory_region_init_io(&s->las2, OBJECT(s), &tpci200_las2_ops, - s, "tpci200_las2", 1024*1024*32); - memory_region_init_io(&s->las3, OBJECT(s), &tpci200_las3_ops, - s, "tpci200_las3", 1024*1024*16); - pci_register_bar(&s->dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mmio); - pci_register_bar(&s->dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &s->io); - pci_register_bar(&s->dev, 2, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->las0); - pci_register_bar(&s->dev, 3, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->las1); - pci_register_bar(&s->dev, 4, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->las2); - pci_register_bar(&s->dev, 5, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->las3); - - ipack_bus_new_inplace(&s->bus, sizeof(s->bus), DEVICE(pci_dev), NULL, - N_MODULES, tpci200_set_irq); - - return 0; -} - -static void tpci200_exitfn(PCIDevice *pci_dev) -{ - TPCI200State *s = TPCI200(pci_dev); - - memory_region_destroy(&s->mmio); - memory_region_destroy(&s->io); - memory_region_destroy(&s->las0); - memory_region_destroy(&s->las1); - memory_region_destroy(&s->las2); - memory_region_destroy(&s->las3); -} - -static const VMStateDescription vmstate_tpci200 = { - .name = "tpci200", - .version_id = 1, - .minimum_version_id = 1, - .minimum_version_id_old = 1, - .fields = (VMStateField[]) { - VMSTATE_PCI_DEVICE(dev, TPCI200State), - VMSTATE_BOOL_ARRAY(big_endian, TPCI200State, 3), - VMSTATE_UINT8_ARRAY(ctrl, TPCI200State, N_MODULES), - VMSTATE_UINT16(status, TPCI200State), - VMSTATE_UINT8(int_set, TPCI200State), - VMSTATE_END_OF_LIST() - } -}; - -static void tpci200_class_init(ObjectClass *klass, void *data) -{ - DeviceClass *dc = DEVICE_CLASS(klass); - PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); - - k->init = tpci200_initfn; - k->exit = tpci200_exitfn; - k->vendor_id = PCI_VENDOR_ID_TEWS; - k->device_id = PCI_DEVICE_ID_TEWS_TPCI200; - k->class_id = PCI_CLASS_BRIDGE_OTHER; - k->subsystem_vendor_id = PCI_VENDOR_ID_TEWS; - k->subsystem_id = 0x300A; - set_bit(DEVICE_CATEGORY_INPUT, dc->categories); - dc->desc = "TEWS TPCI200 IndustryPack carrier"; - dc->vmsd = &vmstate_tpci200; -} - -static const TypeInfo tpci200_info = { - .name = TYPE_TPCI200, - .parent = TYPE_PCI_DEVICE, - .instance_size = sizeof(TPCI200State), - .class_init = tpci200_class_init, -}; - -static void tpci200_register_types(void) -{ - type_register_static(&tpci200_info); -} - -type_init(tpci200_register_types) diff --git a/hw/ipack/Makefile.objs b/hw/ipack/Makefile.objs new file mode 100644 index 0000000000..8b9bdcb549 --- /dev/null +++ b/hw/ipack/Makefile.objs @@ -0,0 +1,2 @@ +common-obj-$(CONFIG_IPACK) += ipack.o +common-obj-$(CONFIG_IPACK) += tpci200.o diff --git a/hw/ipack/ipack.c b/hw/ipack/ipack.c new file mode 100644 index 0000000000..ed63d2ac61 --- /dev/null +++ b/hw/ipack/ipack.c @@ -0,0 +1,120 @@ +/* + * QEMU IndustryPack emulation + * + * Copyright (C) 2012 Igalia, S.L. + * Author: Alberto Garcia + * + * This code is licensed under the GNU GPL v2 or (at your option) any + * later version. + */ + +#include "hw/ipack/ipack.h" + +IPackDevice *ipack_device_find(IPackBus *bus, int32_t slot) +{ + BusChild *kid; + + QTAILQ_FOREACH(kid, &BUS(bus)->children, sibling) { + DeviceState *qdev = kid->child; + IPackDevice *ip = IPACK_DEVICE(qdev); + if (ip->slot == slot) { + return ip; + } + } + return NULL; +} + +void ipack_bus_new_inplace(IPackBus *bus, size_t bus_size, + DeviceState *parent, + const char *name, uint8_t n_slots, + qemu_irq_handler handler) +{ + qbus_create_inplace(bus, bus_size, TYPE_IPACK_BUS, parent, name); + bus->n_slots = n_slots; + bus->set_irq = handler; +} + +static void ipack_device_realize(DeviceState *dev, Error **errp) +{ + IPackDevice *idev = IPACK_DEVICE(dev); + IPackBus *bus = IPACK_BUS(qdev_get_parent_bus(dev)); + IPackDeviceClass *k = IPACK_DEVICE_GET_CLASS(dev); + + if (idev->slot < 0) { + idev->slot = bus->free_slot; + } + if (idev->slot >= bus->n_slots) { + error_setg(errp, "Only %" PRIu8 " slots available.", bus->n_slots); + return; + } + bus->free_slot = idev->slot + 1; + + idev->irq = qemu_allocate_irqs(bus->set_irq, idev, 2); + + k->realize(dev, errp); +} + +static void ipack_device_unrealize(DeviceState *dev, Error **errp) +{ + IPackDevice *idev = IPACK_DEVICE(dev); + IPackDeviceClass *k = IPACK_DEVICE_GET_CLASS(dev); + Error *err = NULL; + + if (k->unrealize) { + k->unrealize(dev, &err); + error_propagate(errp, err); + return; + } + + qemu_free_irqs(idev->irq); +} + +static Property ipack_device_props[] = { + DEFINE_PROP_INT32("slot", IPackDevice, slot, -1), + DEFINE_PROP_END_OF_LIST() +}; + +static void ipack_device_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *k = DEVICE_CLASS(klass); + + set_bit(DEVICE_CATEGORY_INPUT, k->categories); + k->bus_type = TYPE_IPACK_BUS; + k->realize = ipack_device_realize; + k->unrealize = ipack_device_unrealize; + k->props = ipack_device_props; +} + +const VMStateDescription vmstate_ipack_device = { + .name = "ipack_device", + .version_id = 1, + .minimum_version_id = 1, + .minimum_version_id_old = 1, + .fields = (VMStateField[]) { + VMSTATE_INT32(slot, IPackDevice), + VMSTATE_END_OF_LIST() + } +}; + +static const TypeInfo ipack_device_info = { + .name = TYPE_IPACK_DEVICE, + .parent = TYPE_DEVICE, + .instance_size = sizeof(IPackDevice), + .class_size = sizeof(IPackDeviceClass), + .class_init = ipack_device_class_init, + .abstract = true, +}; + +static const TypeInfo ipack_bus_info = { + .name = TYPE_IPACK_BUS, + .parent = TYPE_BUS, + .instance_size = sizeof(IPackBus), +}; + +static void ipack_register_types(void) +{ + type_register_static(&ipack_device_info); + type_register_static(&ipack_bus_info); +} + +type_init(ipack_register_types) diff --git a/hw/ipack/tpci200.c b/hw/ipack/tpci200.c new file mode 100644 index 0000000000..e1b69b4552 --- /dev/null +++ b/hw/ipack/tpci200.c @@ -0,0 +1,672 @@ +/* + * QEMU TEWS TPCI200 IndustryPack carrier emulation + * + * Copyright (C) 2012 Igalia, S.L. + * Author: Alberto Garcia + * + * This code is licensed under the GNU GPL v2 or (at your option) any + * later version. + */ + +#include "hw/ipack/ipack.h" +#include "hw/pci/pci.h" +#include "qemu/bitops.h" +#include + +/* #define DEBUG_TPCI */ + +#ifdef DEBUG_TPCI +#define DPRINTF(fmt, ...) \ + do { fprintf(stderr, "TPCI200: " fmt, ## __VA_ARGS__); } while (0) +#else +#define DPRINTF(fmt, ...) do { } while (0) +#endif + +#define N_MODULES 4 + +#define IP_ID_SPACE 2 +#define IP_INT_SPACE 3 +#define IP_IO_SPACE_ADDR_MASK 0x7F +#define IP_ID_SPACE_ADDR_MASK 0x3F +#define IP_INT_SPACE_ADDR_MASK 0x3F + +#define STATUS_INT(IP, INTNO) BIT((IP) * 2 + (INTNO)) +#define STATUS_TIME(IP) BIT((IP) + 12) +#define STATUS_ERR_ANY 0xF00 + +#define CTRL_CLKRATE BIT(0) +#define CTRL_RECOVER BIT(1) +#define CTRL_TIME_INT BIT(2) +#define CTRL_ERR_INT BIT(3) +#define CTRL_INT_EDGE(INTNO) BIT(4 + (INTNO)) +#define CTRL_INT(INTNO) BIT(6 + (INTNO)) + +#define REG_REV_ID 0x00 +#define REG_IP_A_CTRL 0x02 +#define REG_IP_B_CTRL 0x04 +#define REG_IP_C_CTRL 0x06 +#define REG_IP_D_CTRL 0x08 +#define REG_RESET 0x0A +#define REG_STATUS 0x0C +#define IP_N_FROM_REG(REG) ((REG) / 2 - 1) + +typedef struct { + PCIDevice dev; + IPackBus bus; + MemoryRegion mmio; + MemoryRegion io; + MemoryRegion las0; + MemoryRegion las1; + MemoryRegion las2; + MemoryRegion las3; + bool big_endian[3]; + uint8_t ctrl[N_MODULES]; + uint16_t status; + uint8_t int_set; +} TPCI200State; + +#define TYPE_TPCI200 "tpci200" + +#define TPCI200(obj) \ + OBJECT_CHECK(TPCI200State, (obj), TYPE_TPCI200) + +static const uint8_t local_config_regs[] = { + 0x00, 0xFF, 0xFF, 0x0F, 0x00, 0xFC, 0xFF, 0x0F, 0x00, 0x00, 0x00, + 0x0E, 0x00, 0x00, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, + 0x00, 0x08, 0x01, 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x00, 0x01, + 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0xA0, 0x60, 0x41, 0xD4, + 0xA2, 0x20, 0x41, 0x14, 0xA2, 0x20, 0x41, 0x14, 0xA2, 0x20, 0x01, + 0x14, 0x00, 0x00, 0x00, 0x00, 0x81, 0x00, 0x00, 0x08, 0x01, 0x02, + 0x00, 0x04, 0x01, 0x00, 0x00, 0x01, 0x01, 0x00, 0x80, 0x02, 0x41, + 0x00, 0x00, 0x00, 0x00, 0x40, 0x7A, 0x00, 0x52, 0x92, 0x24, 0x02 +}; + +static void adjust_addr(bool big_endian, hwaddr *addr, unsigned size) +{ + /* During 8 bit access in big endian mode, + odd and even addresses are swapped */ + if (big_endian && size == 1) { + *addr ^= 1; + } +} + +static uint64_t adjust_value(bool big_endian, uint64_t *val, unsigned size) +{ + /* Local spaces only support 8/16 bit access, + * so there's no need to care for sizes > 2 */ + if (big_endian && size == 2) { + *val = bswap16(*val); + } + return *val; +} + +static void tpci200_set_irq(void *opaque, int intno, int level) +{ + IPackDevice *ip = opaque; + IPackBus *bus = IPACK_BUS(qdev_get_parent_bus(DEVICE(ip))); + PCIDevice *pcidev = PCI_DEVICE(BUS(bus)->parent); + TPCI200State *dev = TPCI200(pcidev); + unsigned ip_n = ip->slot; + uint16_t prev_status = dev->status; + + assert(ip->slot >= 0 && ip->slot < N_MODULES); + + /* The requested interrupt must be enabled in the IP CONTROL + * register */ + if (!(dev->ctrl[ip_n] & CTRL_INT(intno))) { + return; + } + + /* Update the interrupt status in the IP STATUS register */ + if (level) { + dev->status |= STATUS_INT(ip_n, intno); + } else { + dev->status &= ~STATUS_INT(ip_n, intno); + } + + /* Return if there are no changes */ + if (dev->status == prev_status) { + return; + } + + DPRINTF("IP %u INT%u#: %u\n", ip_n, intno, level); + + /* Check if the interrupt is edge sensitive */ + if (dev->ctrl[ip_n] & CTRL_INT_EDGE(intno)) { + if (level) { + pci_set_irq(&dev->dev, !dev->int_set); + pci_set_irq(&dev->dev, dev->int_set); + } + } else { + unsigned i, j; + uint16_t level_status = dev->status; + + /* Check if there are any level sensitive interrupts set by + removing the ones that are edge sensitive from the status + register */ + for (i = 0; i < N_MODULES; i++) { + for (j = 0; j < 2; j++) { + if (dev->ctrl[i] & CTRL_INT_EDGE(j)) { + level_status &= ~STATUS_INT(i, j); + } + } + } + + if (level_status && !dev->int_set) { + pci_irq_assert(&dev->dev); + dev->int_set = 1; + } else if (!level_status && dev->int_set) { + pci_irq_deassert(&dev->dev); + dev->int_set = 0; + } + } +} + +static uint64_t tpci200_read_cfg(void *opaque, hwaddr addr, unsigned size) +{ + TPCI200State *s = opaque; + uint8_t ret = 0; + if (addr < ARRAY_SIZE(local_config_regs)) { + ret = local_config_regs[addr]; + } + /* Endianness is stored in the first bit of these registers */ + if ((addr == 0x2b && s->big_endian[0]) || + (addr == 0x2f && s->big_endian[1]) || + (addr == 0x33 && s->big_endian[2])) { + ret |= 1; + } + DPRINTF("Read from LCR 0x%x: 0x%x\n", (unsigned) addr, (unsigned) ret); + return ret; +} + +static void tpci200_write_cfg(void *opaque, hwaddr addr, uint64_t val, + unsigned size) +{ + TPCI200State *s = opaque; + /* Endianness is stored in the first bit of these registers */ + if (addr == 0x2b || addr == 0x2f || addr == 0x33) { + unsigned las = (addr - 0x2b) / 4; + s->big_endian[las] = val & 1; + DPRINTF("LAS%u big endian mode: %u\n", las, (unsigned) val & 1); + } else { + DPRINTF("Write to LCR 0x%x: 0x%x\n", (unsigned) addr, (unsigned) val); + } +} + +static uint64_t tpci200_read_las0(void *opaque, hwaddr addr, unsigned size) +{ + TPCI200State *s = opaque; + uint64_t ret = 0; + + switch (addr) { + + case REG_REV_ID: + DPRINTF("Read REVISION ID\n"); /* Current value is 0x00 */ + break; + + case REG_IP_A_CTRL: + case REG_IP_B_CTRL: + case REG_IP_C_CTRL: + case REG_IP_D_CTRL: + { + unsigned ip_n = IP_N_FROM_REG(addr); + ret = s->ctrl[ip_n]; + DPRINTF("Read IP %c CONTROL: 0x%x\n", 'A' + ip_n, (unsigned) ret); + } + break; + + case REG_RESET: + DPRINTF("Read RESET\n"); /* Not implemented */ + break; + + case REG_STATUS: + ret = s->status; + DPRINTF("Read STATUS: 0x%x\n", (unsigned) ret); + break; + + /* Reserved */ + default: + DPRINTF("Unsupported read from LAS0 0x%x\n", (unsigned) addr); + break; + } + + return adjust_value(s->big_endian[0], &ret, size); +} + +static void tpci200_write_las0(void *opaque, hwaddr addr, uint64_t val, + unsigned size) +{ + TPCI200State *s = opaque; + + adjust_value(s->big_endian[0], &val, size); + + switch (addr) { + + case REG_REV_ID: + DPRINTF("Write Revision ID: 0x%x\n", (unsigned) val); /* No effect */ + break; + + case REG_IP_A_CTRL: + case REG_IP_B_CTRL: + case REG_IP_C_CTRL: + case REG_IP_D_CTRL: + { + unsigned ip_n = IP_N_FROM_REG(addr); + s->ctrl[ip_n] = val; + DPRINTF("Write IP %c CONTROL: 0x%x\n", 'A' + ip_n, (unsigned) val); + } + break; + + case REG_RESET: + DPRINTF("Write RESET: 0x%x\n", (unsigned) val); /* Not implemented */ + break; + + case REG_STATUS: + { + unsigned i; + + for (i = 0; i < N_MODULES; i++) { + IPackDevice *ip = ipack_device_find(&s->bus, i); + + if (ip != NULL) { + if (val & STATUS_INT(i, 0)) { + DPRINTF("Clear IP %c INT0# status\n", 'A' + i); + qemu_irq_lower(ip->irq[0]); + } + if (val & STATUS_INT(i, 1)) { + DPRINTF("Clear IP %c INT1# status\n", 'A' + i); + qemu_irq_lower(ip->irq[1]); + } + } + + if (val & STATUS_TIME(i)) { + DPRINTF("Clear IP %c timeout\n", 'A' + i); + s->status &= ~STATUS_TIME(i); + } + } + + if (val & STATUS_ERR_ANY) { + DPRINTF("Unexpected write to STATUS register: 0x%x\n", + (unsigned) val); + } + } + break; + + /* Reserved */ + default: + DPRINTF("Unsupported write to LAS0 0x%x: 0x%x\n", + (unsigned) addr, (unsigned) val); + break; + } +} + +static uint64_t tpci200_read_las1(void *opaque, hwaddr addr, unsigned size) +{ + TPCI200State *s = opaque; + IPackDevice *ip; + uint64_t ret = 0; + unsigned ip_n, space; + uint8_t offset; + + adjust_addr(s->big_endian[1], &addr, size); + + /* + * The address is divided into the IP module number (0-4), the IP + * address space (I/O, ID, INT) and the offset within that space. + */ + ip_n = addr >> 8; + space = (addr >> 6) & 3; + ip = ipack_device_find(&s->bus, ip_n); + + if (ip == NULL) { + DPRINTF("Read LAS1: IP module %u not installed\n", ip_n); + } else { + IPackDeviceClass *k = IPACK_DEVICE_GET_CLASS(ip); + switch (space) { + + case IP_ID_SPACE: + offset = addr & IP_ID_SPACE_ADDR_MASK; + if (k->id_read) { + ret = k->id_read(ip, offset); + } + break; + + case IP_INT_SPACE: + offset = addr & IP_INT_SPACE_ADDR_MASK; + + /* Read address 0 to ACK IP INT0# and address 2 to ACK IP INT1# */ + if (offset == 0 || offset == 2) { + unsigned intno = offset / 2; + bool int_set = s->status & STATUS_INT(ip_n, intno); + bool int_edge_sensitive = s->ctrl[ip_n] & CTRL_INT_EDGE(intno); + if (int_set && !int_edge_sensitive) { + qemu_irq_lower(ip->irq[intno]); + } + } + + if (k->int_read) { + ret = k->int_read(ip, offset); + } + break; + + default: + offset = addr & IP_IO_SPACE_ADDR_MASK; + if (k->io_read) { + ret = k->io_read(ip, offset); + } + break; + } + } + + return adjust_value(s->big_endian[1], &ret, size); +} + +static void tpci200_write_las1(void *opaque, hwaddr addr, uint64_t val, + unsigned size) +{ + TPCI200State *s = opaque; + IPackDevice *ip; + unsigned ip_n, space; + uint8_t offset; + + adjust_addr(s->big_endian[1], &addr, size); + adjust_value(s->big_endian[1], &val, size); + + /* + * The address is divided into the IP module number, the IP + * address space (I/O, ID, INT) and the offset within that space. + */ + ip_n = addr >> 8; + space = (addr >> 6) & 3; + ip = ipack_device_find(&s->bus, ip_n); + + if (ip == NULL) { + DPRINTF("Write LAS1: IP module %u not installed\n", ip_n); + } else { + IPackDeviceClass *k = IPACK_DEVICE_GET_CLASS(ip); + switch (space) { + + case IP_ID_SPACE: + offset = addr & IP_ID_SPACE_ADDR_MASK; + if (k->id_write) { + k->id_write(ip, offset, val); + } + break; + + case IP_INT_SPACE: + offset = addr & IP_INT_SPACE_ADDR_MASK; + if (k->int_write) { + k->int_write(ip, offset, val); + } + break; + + default: + offset = addr & IP_IO_SPACE_ADDR_MASK; + if (k->io_write) { + k->io_write(ip, offset, val); + } + break; + } + } +} + +static uint64_t tpci200_read_las2(void *opaque, hwaddr addr, unsigned size) +{ + TPCI200State *s = opaque; + IPackDevice *ip; + uint64_t ret = 0; + unsigned ip_n; + uint32_t offset; + + adjust_addr(s->big_endian[2], &addr, size); + + /* + * The address is divided into the IP module number and the offset + * within the IP module MEM space. + */ + ip_n = addr >> 23; + offset = addr & 0x7fffff; + ip = ipack_device_find(&s->bus, ip_n); + + if (ip == NULL) { + DPRINTF("Read LAS2: IP module %u not installed\n", ip_n); + } else { + IPackDeviceClass *k = IPACK_DEVICE_GET_CLASS(ip); + if (k->mem_read16) { + ret = k->mem_read16(ip, offset); + } + } + + return adjust_value(s->big_endian[2], &ret, size); +} + +static void tpci200_write_las2(void *opaque, hwaddr addr, uint64_t val, + unsigned size) +{ + TPCI200State *s = opaque; + IPackDevice *ip; + unsigned ip_n; + uint32_t offset; + + adjust_addr(s->big_endian[2], &addr, size); + adjust_value(s->big_endian[2], &val, size); + + /* + * The address is divided into the IP module number and the offset + * within the IP module MEM space. + */ + ip_n = addr >> 23; + offset = addr & 0x7fffff; + ip = ipack_device_find(&s->bus, ip_n); + + if (ip == NULL) { + DPRINTF("Write LAS2: IP module %u not installed\n", ip_n); + } else { + IPackDeviceClass *k = IPACK_DEVICE_GET_CLASS(ip); + if (k->mem_write16) { + k->mem_write16(ip, offset, val); + } + } +} + +static uint64_t tpci200_read_las3(void *opaque, hwaddr addr, unsigned size) +{ + TPCI200State *s = opaque; + IPackDevice *ip; + uint64_t ret = 0; + /* + * The address is divided into the IP module number and the offset + * within the IP module MEM space. + */ + unsigned ip_n = addr >> 22; + uint32_t offset = addr & 0x3fffff; + + ip = ipack_device_find(&s->bus, ip_n); + + if (ip == NULL) { + DPRINTF("Read LAS3: IP module %u not installed\n", ip_n); + } else { + IPackDeviceClass *k = IPACK_DEVICE_GET_CLASS(ip); + if (k->mem_read8) { + ret = k->mem_read8(ip, offset); + } + } + + return ret; +} + +static void tpci200_write_las3(void *opaque, hwaddr addr, uint64_t val, + unsigned size) +{ + TPCI200State *s = opaque; + IPackDevice *ip; + /* + * The address is divided into the IP module number and the offset + * within the IP module MEM space. + */ + unsigned ip_n = addr >> 22; + uint32_t offset = addr & 0x3fffff; + + ip = ipack_device_find(&s->bus, ip_n); + + if (ip == NULL) { + DPRINTF("Write LAS3: IP module %u not installed\n", ip_n); + } else { + IPackDeviceClass *k = IPACK_DEVICE_GET_CLASS(ip); + if (k->mem_write8) { + k->mem_write8(ip, offset, val); + } + } +} + +static const MemoryRegionOps tpci200_cfg_ops = { + .read = tpci200_read_cfg, + .write = tpci200_write_cfg, + .endianness = DEVICE_NATIVE_ENDIAN, + .valid = { + .min_access_size = 1, + .max_access_size = 4 + }, + .impl = { + .min_access_size = 1, + .max_access_size = 1 + } +}; + +static const MemoryRegionOps tpci200_las0_ops = { + .read = tpci200_read_las0, + .write = tpci200_write_las0, + .endianness = DEVICE_NATIVE_ENDIAN, + .valid = { + .min_access_size = 2, + .max_access_size = 2 + } +}; + +static const MemoryRegionOps tpci200_las1_ops = { + .read = tpci200_read_las1, + .write = tpci200_write_las1, + .endianness = DEVICE_NATIVE_ENDIAN, + .valid = { + .min_access_size = 1, + .max_access_size = 2 + } +}; + +static const MemoryRegionOps tpci200_las2_ops = { + .read = tpci200_read_las2, + .write = tpci200_write_las2, + .endianness = DEVICE_NATIVE_ENDIAN, + .valid = { + .min_access_size = 1, + .max_access_size = 2 + } +}; + +static const MemoryRegionOps tpci200_las3_ops = { + .read = tpci200_read_las3, + .write = tpci200_write_las3, + .endianness = DEVICE_NATIVE_ENDIAN, + .valid = { + .min_access_size = 1, + .max_access_size = 1 + } +}; + +static int tpci200_initfn(PCIDevice *pci_dev) +{ + TPCI200State *s = TPCI200(pci_dev); + uint8_t *c = s->dev.config; + + pci_set_word(c + PCI_COMMAND, 0x0003); + pci_set_word(c + PCI_STATUS, 0x0280); + + pci_set_byte(c + PCI_INTERRUPT_PIN, 0x01); /* Interrupt pin A */ + + pci_set_byte(c + PCI_CAPABILITY_LIST, 0x40); + pci_set_long(c + 0x40, 0x48014801); + pci_set_long(c + 0x48, 0x00024C06); + pci_set_long(c + 0x4C, 0x00000003); + + memory_region_init_io(&s->mmio, OBJECT(s), &tpci200_cfg_ops, + s, "tpci200_mmio", 128); + memory_region_init_io(&s->io, OBJECT(s), &tpci200_cfg_ops, + s, "tpci200_io", 128); + memory_region_init_io(&s->las0, OBJECT(s), &tpci200_las0_ops, + s, "tpci200_las0", 256); + memory_region_init_io(&s->las1, OBJECT(s), &tpci200_las1_ops, + s, "tpci200_las1", 1024); + memory_region_init_io(&s->las2, OBJECT(s), &tpci200_las2_ops, + s, "tpci200_las2", 1024*1024*32); + memory_region_init_io(&s->las3, OBJECT(s), &tpci200_las3_ops, + s, "tpci200_las3", 1024*1024*16); + pci_register_bar(&s->dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mmio); + pci_register_bar(&s->dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &s->io); + pci_register_bar(&s->dev, 2, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->las0); + pci_register_bar(&s->dev, 3, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->las1); + pci_register_bar(&s->dev, 4, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->las2); + pci_register_bar(&s->dev, 5, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->las3); + + ipack_bus_new_inplace(&s->bus, sizeof(s->bus), DEVICE(pci_dev), NULL, + N_MODULES, tpci200_set_irq); + + return 0; +} + +static void tpci200_exitfn(PCIDevice *pci_dev) +{ + TPCI200State *s = TPCI200(pci_dev); + + memory_region_destroy(&s->mmio); + memory_region_destroy(&s->io); + memory_region_destroy(&s->las0); + memory_region_destroy(&s->las1); + memory_region_destroy(&s->las2); + memory_region_destroy(&s->las3); +} + +static const VMStateDescription vmstate_tpci200 = { + .name = "tpci200", + .version_id = 1, + .minimum_version_id = 1, + .minimum_version_id_old = 1, + .fields = (VMStateField[]) { + VMSTATE_PCI_DEVICE(dev, TPCI200State), + VMSTATE_BOOL_ARRAY(big_endian, TPCI200State, 3), + VMSTATE_UINT8_ARRAY(ctrl, TPCI200State, N_MODULES), + VMSTATE_UINT16(status, TPCI200State), + VMSTATE_UINT8(int_set, TPCI200State), + VMSTATE_END_OF_LIST() + } +}; + +static void tpci200_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); + + k->init = tpci200_initfn; + k->exit = tpci200_exitfn; + k->vendor_id = PCI_VENDOR_ID_TEWS; + k->device_id = PCI_DEVICE_ID_TEWS_TPCI200; + k->class_id = PCI_CLASS_BRIDGE_OTHER; + k->subsystem_vendor_id = PCI_VENDOR_ID_TEWS; + k->subsystem_id = 0x300A; + set_bit(DEVICE_CATEGORY_INPUT, dc->categories); + dc->desc = "TEWS TPCI200 IndustryPack carrier"; + dc->vmsd = &vmstate_tpci200; +} + +static const TypeInfo tpci200_info = { + .name = TYPE_TPCI200, + .parent = TYPE_PCI_DEVICE, + .instance_size = sizeof(TPCI200State), + .class_init = tpci200_class_init, +}; + +static void tpci200_register_types(void) +{ + type_register_static(&tpci200_info); +} + +type_init(tpci200_register_types) -- cgit v1.2.1 From 7d9268647ca39561a0e9ae55717e09049377bb33 Mon Sep 17 00:00:00 2001 From: Paolo Bonzini Date: Sat, 8 Feb 2014 11:01:45 +0100 Subject: qdev: Sizes are now parsed by StringInputVisitor MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Reviewed-by: Igor Mammedov Reviewed-by: Eric Blake Signed-off-by: Paolo Bonzini Signed-off-by: Andreas Färber --- hw/core/qdev-properties.c | 11 ----------- 1 file changed, 11 deletions(-) (limited to 'hw') diff --git a/hw/core/qdev-properties.c b/hw/core/qdev-properties.c index b949f0e42a..da37710247 100644 --- a/hw/core/qdev-properties.c +++ b/hw/core/qdev-properties.c @@ -1140,16 +1140,6 @@ static void set_size(Object *obj, Visitor *v, void *opaque, visit_type_size(v, ptr, name, errp); } -static int parse_size(DeviceState *dev, Property *prop, const char *str) -{ - uint64_t *ptr = qdev_get_prop_ptr(dev, prop); - - if (str != NULL) { - parse_option_size(prop->name, str, ptr, &error_abort); - } - return 0; -} - static int print_size(DeviceState *dev, Property *prop, char *dest, size_t len) { static const char suffixes[] = { 'B', 'K', 'M', 'G', 'T' }; @@ -1171,7 +1161,6 @@ static int print_size(DeviceState *dev, Property *prop, char *dest, size_t len) PropertyInfo qdev_prop_size = { .name = "size", - .parse = parse_size, .print = print_size, .get = get_size, .set = set_size, -- cgit v1.2.1 From 9e4d9620c42649de7b6a0c5f5e1ed8fa0299b5c3 Mon Sep 17 00:00:00 2001 From: Paolo Bonzini Date: Sat, 8 Feb 2014 11:01:46 +0100 Subject: qdev: Remove legacy parsers for hex8/32/64 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The hexNN property types have not been accepting values not prefixed by "0x" since QEMU 1.2. Parse those values as decimals now. Reviewed-by: Igor Mammedov Reviewed-by: Eric Blake Signed-off-by: Paolo Bonzini Signed-off-by: Andreas Färber --- hw/core/qdev-properties.c | 54 ----------------------------------------------- 1 file changed, 54 deletions(-) (limited to 'hw') diff --git a/hw/core/qdev-properties.c b/hw/core/qdev-properties.c index da37710247..e223ce1887 100644 --- a/hw/core/qdev-properties.c +++ b/hw/core/qdev-properties.c @@ -189,23 +189,6 @@ PropertyInfo qdev_prop_uint8 = { /* --- 8bit hex value --- */ -static int parse_hex8(DeviceState *dev, Property *prop, const char *str) -{ - uint8_t *ptr = qdev_get_prop_ptr(dev, prop); - char *end; - - if (str[0] != '0' || str[1] != 'x') { - return -EINVAL; - } - - *ptr = strtoul(str, &end, 16); - if ((*end != '\0') || (end == str)) { - return -EINVAL; - } - - return 0; -} - static int print_hex8(DeviceState *dev, Property *prop, char *dest, size_t len) { uint8_t *ptr = qdev_get_prop_ptr(dev, prop); @@ -215,7 +198,6 @@ static int print_hex8(DeviceState *dev, Property *prop, char *dest, size_t len) PropertyInfo qdev_prop_hex8 = { .name = "uint8", .legacy_name = "hex8", - .parse = parse_hex8, .print = print_hex8, .get = get_uint8, .set = set_uint8, @@ -320,23 +302,6 @@ PropertyInfo qdev_prop_int32 = { /* --- 32bit hex value --- */ -static int parse_hex32(DeviceState *dev, Property *prop, const char *str) -{ - uint32_t *ptr = qdev_get_prop_ptr(dev, prop); - char *end; - - if (str[0] != '0' || str[1] != 'x') { - return -EINVAL; - } - - *ptr = strtoul(str, &end, 16); - if ((*end != '\0') || (end == str)) { - return -EINVAL; - } - - return 0; -} - static int print_hex32(DeviceState *dev, Property *prop, char *dest, size_t len) { uint32_t *ptr = qdev_get_prop_ptr(dev, prop); @@ -346,7 +311,6 @@ static int print_hex32(DeviceState *dev, Property *prop, char *dest, size_t len) PropertyInfo qdev_prop_hex32 = { .name = "uint32", .legacy_name = "hex32", - .parse = parse_hex32, .print = print_hex32, .get = get_uint32, .set = set_uint32, @@ -387,23 +351,6 @@ PropertyInfo qdev_prop_uint64 = { /* --- 64bit hex value --- */ -static int parse_hex64(DeviceState *dev, Property *prop, const char *str) -{ - uint64_t *ptr = qdev_get_prop_ptr(dev, prop); - char *end; - - if (str[0] != '0' || str[1] != 'x') { - return -EINVAL; - } - - *ptr = strtoull(str, &end, 16); - if ((*end != '\0') || (end == str)) { - return -EINVAL; - } - - return 0; -} - static int print_hex64(DeviceState *dev, Property *prop, char *dest, size_t len) { uint64_t *ptr = qdev_get_prop_ptr(dev, prop); @@ -413,7 +360,6 @@ static int print_hex64(DeviceState *dev, Property *prop, char *dest, size_t len) PropertyInfo qdev_prop_hex64 = { .name = "uint64", .legacy_name = "hex64", - .parse = parse_hex64, .print = print_hex64, .get = get_uint64, .set = set_uint64, -- cgit v1.2.1 From 03ff777048eda53eaf5bd95705418ae7e825ce56 Mon Sep 17 00:00:00 2001 From: Paolo Bonzini Date: Sat, 8 Feb 2014 11:01:47 +0100 Subject: qdev: Legacy properties are now read-only MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Reviewed-by: Igor Mammedov Reviewed-by: Eric Blake Signed-off-by: Paolo Bonzini Signed-off-by: Andreas Färber --- hw/core/qdev-properties.c | 10 +--------- hw/core/qdev.c | 30 ++---------------------------- 2 files changed, 3 insertions(+), 37 deletions(-) (limited to 'hw') diff --git a/hw/core/qdev-properties.c b/hw/core/qdev-properties.c index e223ce1887..a60a1837c7 100644 --- a/hw/core/qdev-properties.c +++ b/hw/core/qdev-properties.c @@ -936,15 +936,7 @@ void error_set_from_qdev_prop_error(Error **errp, int ret, DeviceState *dev, void qdev_prop_parse(DeviceState *dev, const char *name, const char *value, Error **errp) { - char *legacy_name; - - legacy_name = g_strdup_printf("legacy-%s", name); - if (object_property_get_type(OBJECT(dev), legacy_name, NULL)) { - object_property_parse(OBJECT(dev), value, legacy_name, errp); - } else { - object_property_parse(OBJECT(dev), value, name, errp); - } - g_free(legacy_name); + object_property_parse(OBJECT(dev), value, name, errp); } void qdev_prop_set_bit(DeviceState *dev, const char *name, bool value) diff --git a/hw/core/qdev.c b/hw/core/qdev.c index 82a9123038..7c1b7325ca 100644 --- a/hw/core/qdev.c +++ b/hw/core/qdev.c @@ -578,31 +578,6 @@ static void qdev_get_legacy_property(Object *obj, Visitor *v, void *opaque, visit_type_str(v, &ptr, name, errp); } -static void qdev_set_legacy_property(Object *obj, Visitor *v, void *opaque, - const char *name, Error **errp) -{ - DeviceState *dev = DEVICE(obj); - Property *prop = opaque; - Error *local_err = NULL; - char *ptr = NULL; - int ret; - - if (dev->realized) { - qdev_prop_set_after_realize(dev, name, errp); - return; - } - - visit_type_str(v, &ptr, name, &local_err); - if (local_err) { - error_propagate(errp, local_err); - return; - } - - ret = prop->info->parse(dev, prop, ptr); - error_set_from_qdev_prop_error(errp, ret, dev, prop, ptr); - g_free(ptr); -} - /** * @qdev_add_legacy_property - adds a legacy property * @@ -618,8 +593,7 @@ void qdev_property_add_legacy(DeviceState *dev, Property *prop, gchar *name, *type; /* Register pointer properties as legacy properties */ - if (!prop->info->print && !prop->info->parse && - (prop->info->set || prop->info->get)) { + if (!prop->info->print && prop->info->get) { return; } @@ -629,7 +603,7 @@ void qdev_property_add_legacy(DeviceState *dev, Property *prop, object_property_add(OBJECT(dev), name, type, prop->info->print ? qdev_get_legacy_property : prop->info->get, - prop->info->parse ? qdev_set_legacy_property : prop->info->set, + NULL, NULL, prop, errp); -- cgit v1.2.1 From 7ce7ffe02750c73e4dce9fd61d25d0fd0b793a2e Mon Sep 17 00:00:00 2001 From: Paolo Bonzini Date: Sat, 8 Feb 2014 11:01:48 +0100 Subject: qdev: Legacy properties are just strings MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit prop->info->legacy_name is still used by "-device foo,?". Reviewed-by: Igor Mammedov Reviewed-by: Eric Blake Signed-off-by: Paolo Bonzini Signed-off-by: Andreas Färber --- hw/core/qdev.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) (limited to 'hw') diff --git a/hw/core/qdev.c b/hw/core/qdev.c index 7c1b7325ca..482a9780d1 100644 --- a/hw/core/qdev.c +++ b/hw/core/qdev.c @@ -590,7 +590,7 @@ static void qdev_get_legacy_property(Object *obj, Visitor *v, void *opaque, void qdev_property_add_legacy(DeviceState *dev, Property *prop, Error **errp) { - gchar *name, *type; + gchar *name; /* Register pointer properties as legacy properties */ if (!prop->info->print && prop->info->get) { @@ -598,16 +598,12 @@ void qdev_property_add_legacy(DeviceState *dev, Property *prop, } name = g_strdup_printf("legacy-%s", prop->name); - type = g_strdup_printf("legacy<%s>", - prop->info->legacy_name ?: prop->info->name); - - object_property_add(OBJECT(dev), name, type, + object_property_add(OBJECT(dev), name, "str", prop->info->print ? qdev_get_legacy_property : prop->info->get, NULL, NULL, prop, errp); - g_free(type); g_free(name); } -- cgit v1.2.1 From 98a6528461acf7a6f321d846e6f4e77e87305965 Mon Sep 17 00:00:00 2001 From: Paolo Bonzini Date: Sat, 8 Feb 2014 11:01:49 +0100 Subject: qdev: Inline qdev_prop_parse() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Reviewed-by: Igor Mammedov Reviewed-by: Eric Blake Signed-off-by: Paolo Bonzini Signed-off-by: Andreas Färber --- hw/core/qdev-properties.c | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) (limited to 'hw') diff --git a/hw/core/qdev-properties.c b/hw/core/qdev-properties.c index a60a1837c7..22ddebf92a 100644 --- a/hw/core/qdev-properties.c +++ b/hw/core/qdev-properties.c @@ -933,12 +933,6 @@ void error_set_from_qdev_prop_error(Error **errp, int ret, DeviceState *dev, } } -void qdev_prop_parse(DeviceState *dev, const char *name, const char *value, - Error **errp) -{ - object_property_parse(OBJECT(dev), value, name, errp); -} - void qdev_prop_set_bit(DeviceState *dev, const char *name, bool value) { object_property_set_bool(OBJECT(dev), value, name, &error_abort); @@ -1031,7 +1025,7 @@ void qdev_prop_set_globals_for_type(DeviceState *dev, const char *typename, if (strcmp(typename, prop->driver) != 0) { continue; } - qdev_prop_parse(dev, prop->property, prop->value, &err); + object_property_parse(OBJECT(dev), prop->value, prop->property, &err); if (err != NULL) { error_propagate(errp, err); return; -- cgit v1.2.1 From 515f23462b10174c953fd161a37e9093b2427cff Mon Sep 17 00:00:00 2001 From: Paolo Bonzini Date: Sat, 8 Feb 2014 11:01:52 +0100 Subject: qdev: Remove most legacy printers MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Their functionality is either aesthetic only (e.g. on/off vs. true/false) or obtained by the "human mode" of StringOutputVisitor. Reviewed-by: Igor Mammedov Reviewed-by: Eric Blake Signed-off-by: Paolo Bonzini Signed-off-by: Andreas Färber --- hw/core/qdev-properties.c | 60 ----------------------------------------------- 1 file changed, 60 deletions(-) (limited to 'hw') diff --git a/hw/core/qdev-properties.c b/hw/core/qdev-properties.c index 22ddebf92a..a4f1f78e6c 100644 --- a/hw/core/qdev-properties.c +++ b/hw/core/qdev-properties.c @@ -74,13 +74,6 @@ static void bit_prop_set(DeviceState *dev, Property *props, bool val) } } -static int prop_print_bit(DeviceState *dev, Property *prop, char *dest, - size_t len) -{ - uint32_t *p = qdev_get_prop_ptr(dev, prop); - return snprintf(dest, len, (*p & qdev_get_prop_mask(prop)) ? "on" : "off"); -} - static void prop_get_bit(Object *obj, Visitor *v, void *opaque, const char *name, Error **errp) { @@ -116,7 +109,6 @@ static void prop_set_bit(Object *obj, Visitor *v, void *opaque, PropertyInfo qdev_prop_bit = { .name = "boolean", .legacy_name = "on/off", - .print = prop_print_bit, .get = prop_get_bit, .set = prop_set_bit, }; @@ -189,16 +181,9 @@ PropertyInfo qdev_prop_uint8 = { /* --- 8bit hex value --- */ -static int print_hex8(DeviceState *dev, Property *prop, char *dest, size_t len) -{ - uint8_t *ptr = qdev_get_prop_ptr(dev, prop); - return snprintf(dest, len, "0x%" PRIx8, *ptr); -} - PropertyInfo qdev_prop_hex8 = { .name = "uint8", .legacy_name = "hex8", - .print = print_hex8, .get = get_uint8, .set = set_uint8, }; @@ -302,16 +287,9 @@ PropertyInfo qdev_prop_int32 = { /* --- 32bit hex value --- */ -static int print_hex32(DeviceState *dev, Property *prop, char *dest, size_t len) -{ - uint32_t *ptr = qdev_get_prop_ptr(dev, prop); - return snprintf(dest, len, "0x%" PRIx32, *ptr); -} - PropertyInfo qdev_prop_hex32 = { .name = "uint32", .legacy_name = "hex32", - .print = print_hex32, .get = get_uint32, .set = set_uint32, }; @@ -351,16 +329,9 @@ PropertyInfo qdev_prop_uint64 = { /* --- 64bit hex value --- */ -static int print_hex64(DeviceState *dev, Property *prop, char *dest, size_t len) -{ - uint64_t *ptr = qdev_get_prop_ptr(dev, prop); - return snprintf(dest, len, "0x%" PRIx64, *ptr); -} - PropertyInfo qdev_prop_hex64 = { .name = "uint64", .legacy_name = "hex64", - .print = print_hex64, .get = get_uint64, .set = set_uint64, }; @@ -373,16 +344,6 @@ static void release_string(Object *obj, const char *name, void *opaque) g_free(*(char **)qdev_get_prop_ptr(DEVICE(obj), prop)); } -static int print_string(DeviceState *dev, Property *prop, char *dest, - size_t len) -{ - char **ptr = qdev_get_prop_ptr(dev, prop); - if (!*ptr) { - return snprintf(dest, len, ""); - } - return snprintf(dest, len, "\"%s\"", *ptr); -} - static void get_string(Object *obj, Visitor *v, void *opaque, const char *name, Error **errp) { @@ -425,7 +386,6 @@ static void set_string(Object *obj, Visitor *v, void *opaque, PropertyInfo qdev_prop_string = { .name = "string", - .print = print_string, .release = release_string, .get = get_string, .set = set_string, @@ -1072,28 +1032,8 @@ static void set_size(Object *obj, Visitor *v, void *opaque, visit_type_size(v, ptr, name, errp); } -static int print_size(DeviceState *dev, Property *prop, char *dest, size_t len) -{ - static const char suffixes[] = { 'B', 'K', 'M', 'G', 'T' }; - uint64_t div, val = *(uint64_t *)qdev_get_prop_ptr(dev, prop); - int i; - - /* Compute floor(log2(val)). */ - i = 64 - clz64(val); - - /* Find the power of 1024 that we'll display as the units. */ - i /= 10; - if (i >= ARRAY_SIZE(suffixes)) { - i = ARRAY_SIZE(suffixes) - 1; - } - div = 1ULL << (i * 10); - - return snprintf(dest, len, "%0.03f%c", (double)val/div, suffixes[i]); -} - PropertyInfo qdev_prop_size = { .name = "size", - .print = print_size, .get = get_size, .set = set_size, }; -- cgit v1.2.1 From c7bcc85d664b26b8b1e46416c7a730104b602e34 Mon Sep 17 00:00:00 2001 From: Paolo Bonzini Date: Sat, 8 Feb 2014 11:01:53 +0100 Subject: qdev: Remove hex8/32/64 property types MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Replace them with uint8/32/64. Reviewed-by: Igor Mammedov Reviewed-by: Eric Blake Signed-off-by: Paolo Bonzini Signed-off-by: Andreas Färber --- hw/audio/adlib.c | 2 +- hw/audio/cs4231a.c | 2 +- hw/audio/gus.c | 2 +- hw/audio/pcspk.c | 2 +- hw/audio/sb16.c | 4 ++-- hw/block/fdc.c | 2 +- hw/char/debugcon.c | 4 ++-- hw/char/parallel.c | 2 +- hw/char/serial-isa.c | 2 +- hw/core/qdev-properties.c | 27 --------------------------- hw/display/g364fb.c | 2 +- hw/display/tcx.c | 4 ++-- hw/dma/i82374.c | 2 +- hw/dma/sun4m_iommu.c | 2 +- hw/i386/kvm/i8254.c | 2 +- hw/ide/isa.c | 4 ++-- hw/ide/qdev.c | 2 +- hw/intc/i8259_common.c | 6 +++--- hw/isa/pc87312.c | 2 +- hw/misc/applesmc.c | 2 +- hw/misc/debugexit.c | 4 ++-- hw/misc/eccmemctl.c | 2 +- hw/net/ne2000-isa.c | 2 +- hw/nvram/fw_cfg.c | 4 ++-- hw/ppc/spapr_pci.c | 16 ++++++++-------- hw/scsi/megasas.c | 2 +- hw/scsi/scsi-disk.c | 6 +++--- hw/sd/sdhci.c | 4 ++-- hw/timer/i8254.c | 2 +- hw/timer/m48t59.c | 4 ++-- hw/usb/host-libusb.c | 4 ++-- hw/virtio/virtio-pci.c | 6 +++--- 32 files changed, 53 insertions(+), 80 deletions(-) (limited to 'hw') diff --git a/hw/audio/adlib.c b/hw/audio/adlib.c index e88d2dd845..28eed81280 100644 --- a/hw/audio/adlib.c +++ b/hw/audio/adlib.c @@ -354,7 +354,7 @@ static void adlib_realizefn (DeviceState *dev, Error **errp) } static Property adlib_properties[] = { - DEFINE_PROP_HEX32 ("iobase", AdlibState, port, 0x220), + DEFINE_PROP_UINT32 ("iobase", AdlibState, port, 0x220), DEFINE_PROP_UINT32 ("freq", AdlibState, freq, 44100), DEFINE_PROP_END_OF_LIST (), }; diff --git a/hw/audio/cs4231a.c b/hw/audio/cs4231a.c index 666096be07..a0ec17a836 100644 --- a/hw/audio/cs4231a.c +++ b/hw/audio/cs4231a.c @@ -673,7 +673,7 @@ static int cs4231a_init (ISABus *bus) } static Property cs4231a_properties[] = { - DEFINE_PROP_HEX32 ("iobase", CSState, port, 0x534), + DEFINE_PROP_UINT32 ("iobase", CSState, port, 0x534), DEFINE_PROP_UINT32 ("irq", CSState, irq, 9), DEFINE_PROP_UINT32 ("dma", CSState, dma, 3), DEFINE_PROP_END_OF_LIST (), diff --git a/hw/audio/gus.c b/hw/audio/gus.c index 71be3c6ba5..e29a5715db 100644 --- a/hw/audio/gus.c +++ b/hw/audio/gus.c @@ -304,7 +304,7 @@ static int GUS_init (ISABus *bus) static Property gus_properties[] = { DEFINE_PROP_UINT32 ("freq", GUSState, freq, 44100), - DEFINE_PROP_HEX32 ("iobase", GUSState, port, 0x240), + DEFINE_PROP_UINT32 ("iobase", GUSState, port, 0x240), DEFINE_PROP_UINT32 ("irq", GUSState, emu.gusirq, 7), DEFINE_PROP_UINT32 ("dma", GUSState, emu.gusdma, 3), DEFINE_PROP_END_OF_LIST (), diff --git a/hw/audio/pcspk.c b/hw/audio/pcspk.c index f980d66b2f..1d81bbe6aa 100644 --- a/hw/audio/pcspk.c +++ b/hw/audio/pcspk.c @@ -181,7 +181,7 @@ static void pcspk_realizefn(DeviceState *dev, Error **errp) } static Property pcspk_properties[] = { - DEFINE_PROP_HEX32("iobase", PCSpkState, iobase, -1), + DEFINE_PROP_UINT32("iobase", PCSpkState, iobase, -1), DEFINE_PROP_PTR("pit", PCSpkState, pit), DEFINE_PROP_END_OF_LIST(), }; diff --git a/hw/audio/sb16.c b/hw/audio/sb16.c index db79131cf1..bb24e00f2c 100644 --- a/hw/audio/sb16.c +++ b/hw/audio/sb16.c @@ -1399,8 +1399,8 @@ static int SB16_init (ISABus *bus) } static Property sb16_properties[] = { - DEFINE_PROP_HEX32 ("version", SB16State, ver, 0x0405), /* 4.5 */ - DEFINE_PROP_HEX32 ("iobase", SB16State, port, 0x220), + DEFINE_PROP_UINT32 ("version", SB16State, ver, 0x0405), /* 4.5 */ + DEFINE_PROP_UINT32 ("iobase", SB16State, port, 0x220), DEFINE_PROP_UINT32 ("irq", SB16State, irq, 5), DEFINE_PROP_UINT32 ("dma", SB16State, dma, 1), DEFINE_PROP_UINT32 ("dma16", SB16State, hdma, 5), diff --git a/hw/block/fdc.c b/hw/block/fdc.c index 592b58f9b5..16510077db 100644 --- a/hw/block/fdc.c +++ b/hw/block/fdc.c @@ -2216,7 +2216,7 @@ static const VMStateDescription vmstate_isa_fdc ={ }; static Property isa_fdc_properties[] = { - DEFINE_PROP_HEX32("iobase", FDCtrlISABus, iobase, 0x3f0), + DEFINE_PROP_UINT32("iobase", FDCtrlISABus, iobase, 0x3f0), DEFINE_PROP_UINT32("irq", FDCtrlISABus, irq, 6), DEFINE_PROP_UINT32("dma", FDCtrlISABus, dma, 2), DEFINE_PROP_DRIVE("driveA", FDCtrlISABus, state.drives[0].bs), diff --git a/hw/char/debugcon.c b/hw/char/debugcon.c index 02d0d57a79..36f1c4adb3 100644 --- a/hw/char/debugcon.c +++ b/hw/char/debugcon.c @@ -110,9 +110,9 @@ static void debugcon_isa_realizefn(DeviceState *dev, Error **errp) } static Property debugcon_isa_properties[] = { - DEFINE_PROP_HEX32("iobase", ISADebugconState, iobase, 0xe9), + DEFINE_PROP_UINT32("iobase", ISADebugconState, iobase, 0xe9), DEFINE_PROP_CHR("chardev", ISADebugconState, state.chr), - DEFINE_PROP_HEX32("readback", ISADebugconState, state.readback, 0xe9), + DEFINE_PROP_UINT32("readback", ISADebugconState, state.readback, 0xe9), DEFINE_PROP_END_OF_LIST(), }; diff --git a/hw/char/parallel.c b/hw/char/parallel.c index 7a3b2647cf..7ac90a512b 100644 --- a/hw/char/parallel.c +++ b/hw/char/parallel.c @@ -595,7 +595,7 @@ bool parallel_mm_init(MemoryRegion *address_space, static Property parallel_isa_properties[] = { DEFINE_PROP_UINT32("index", ISAParallelState, index, -1), - DEFINE_PROP_HEX32("iobase", ISAParallelState, iobase, -1), + DEFINE_PROP_UINT32("iobase", ISAParallelState, iobase, -1), DEFINE_PROP_UINT32("irq", ISAParallelState, isairq, 7), DEFINE_PROP_CHR("chardev", ISAParallelState, state.chr), DEFINE_PROP_END_OF_LIST(), diff --git a/hw/char/serial-isa.c b/hw/char/serial-isa.c index 5cb77b311a..c9fcb2761f 100644 --- a/hw/char/serial-isa.c +++ b/hw/char/serial-isa.c @@ -88,7 +88,7 @@ static const VMStateDescription vmstate_isa_serial = { static Property serial_isa_properties[] = { DEFINE_PROP_UINT32("index", ISASerialState, index, -1), - DEFINE_PROP_HEX32("iobase", ISASerialState, iobase, -1), + DEFINE_PROP_UINT32("iobase", ISASerialState, iobase, -1), DEFINE_PROP_UINT32("irq", ISASerialState, isairq, -1), DEFINE_PROP_CHR("chardev", ISASerialState, state.chr), DEFINE_PROP_UINT32("wakeup", ISASerialState, state.wakeup, 0), diff --git a/hw/core/qdev-properties.c b/hw/core/qdev-properties.c index a4f1f78e6c..2c3a756305 100644 --- a/hw/core/qdev-properties.c +++ b/hw/core/qdev-properties.c @@ -179,15 +179,6 @@ PropertyInfo qdev_prop_uint8 = { .set = set_uint8, }; -/* --- 8bit hex value --- */ - -PropertyInfo qdev_prop_hex8 = { - .name = "uint8", - .legacy_name = "hex8", - .get = get_uint8, - .set = set_uint8, -}; - /* --- 16bit integer --- */ static void get_uint16(Object *obj, Visitor *v, void *opaque, @@ -285,15 +276,6 @@ PropertyInfo qdev_prop_int32 = { .set = set_int32, }; -/* --- 32bit hex value --- */ - -PropertyInfo qdev_prop_hex32 = { - .name = "uint32", - .legacy_name = "hex32", - .get = get_uint32, - .set = set_uint32, -}; - /* --- 64bit integer --- */ static void get_uint64(Object *obj, Visitor *v, void *opaque, @@ -327,15 +309,6 @@ PropertyInfo qdev_prop_uint64 = { .set = set_uint64, }; -/* --- 64bit hex value --- */ - -PropertyInfo qdev_prop_hex64 = { - .name = "uint64", - .legacy_name = "hex64", - .get = get_uint64, - .set = set_uint64, -}; - /* --- string --- */ static void release_string(Object *obj, const char *name, void *opaque) diff --git a/hw/display/g364fb.c b/hw/display/g364fb.c index 7082171b82..bc909bb3de 100644 --- a/hw/display/g364fb.c +++ b/hw/display/g364fb.c @@ -524,7 +524,7 @@ static void g364fb_sysbus_reset(DeviceState *d) } static Property g364fb_sysbus_properties[] = { - DEFINE_PROP_HEX32("vram_size", G364SysBusState, g364.vram_size, + DEFINE_PROP_UINT32("vram_size", G364SysBusState, g364.vram_size, 8 * 1024 * 1024), DEFINE_PROP_END_OF_LIST(), }; diff --git a/hw/display/tcx.c b/hw/display/tcx.c index 873b82c8db..e60769c2c9 100644 --- a/hw/display/tcx.c +++ b/hw/display/tcx.c @@ -617,11 +617,11 @@ static int tcx_init1(SysBusDevice *dev) } static Property tcx_properties[] = { - DEFINE_PROP_HEX32("vram_size", TCXState, vram_size, -1), + DEFINE_PROP_UINT32("vram_size", TCXState, vram_size, -1), DEFINE_PROP_UINT16("width", TCXState, width, -1), DEFINE_PROP_UINT16("height", TCXState, height, -1), DEFINE_PROP_UINT16("depth", TCXState, depth, -1), - DEFINE_PROP_HEX64("prom_addr", TCXState, prom_addr, -1), + DEFINE_PROP_UINT64("prom_addr", TCXState, prom_addr, -1), DEFINE_PROP_END_OF_LIST(), }; diff --git a/hw/dma/i82374.c b/hw/dma/i82374.c index a5b891f968..dc7a767ee2 100644 --- a/hw/dma/i82374.c +++ b/hw/dma/i82374.c @@ -149,7 +149,7 @@ static void i82374_isa_realize(DeviceState *dev, Error **errp) } static Property i82374_properties[] = { - DEFINE_PROP_HEX32("iobase", ISAi82374State, iobase, 0x400), + DEFINE_PROP_UINT32("iobase", ISAi82374State, iobase, 0x400), DEFINE_PROP_END_OF_LIST() }; diff --git a/hw/dma/sun4m_iommu.c b/hw/dma/sun4m_iommu.c index 723f66d8f2..899d454353 100644 --- a/hw/dma/sun4m_iommu.c +++ b/hw/dma/sun4m_iommu.c @@ -362,7 +362,7 @@ static int iommu_init1(SysBusDevice *dev) } static Property iommu_properties[] = { - DEFINE_PROP_HEX32("version", IOMMUState, version, 0), + DEFINE_PROP_UINT32("version", IOMMUState, version, 0), DEFINE_PROP_END_OF_LIST(), }; diff --git a/hw/i386/kvm/i8254.c b/hw/i386/kvm/i8254.c index 20b6457fbd..f8f302109a 100644 --- a/hw/i386/kvm/i8254.c +++ b/hw/i386/kvm/i8254.c @@ -298,7 +298,7 @@ static void kvm_pit_realizefn(DeviceState *dev, Error **errp) } static Property kvm_pit_properties[] = { - DEFINE_PROP_HEX32("iobase", PITCommonState, iobase, -1), + DEFINE_PROP_UINT32("iobase", PITCommonState, iobase, -1), DEFINE_PROP_LOSTTICKPOLICY("lost_tick_policy", KVMPITState, lost_tick_policy, LOST_TICK_DELAY), DEFINE_PROP_END_OF_LIST(), diff --git a/hw/ide/isa.c b/hw/ide/isa.c index afc24d4728..d2cabc142f 100644 --- a/hw/ide/isa.c +++ b/hw/ide/isa.c @@ -104,8 +104,8 @@ ISADevice *isa_ide_init(ISABus *bus, int iobase, int iobase2, int isairq, } static Property isa_ide_properties[] = { - DEFINE_PROP_HEX32("iobase", ISAIDEState, iobase, 0x1f0), - DEFINE_PROP_HEX32("iobase2", ISAIDEState, iobase2, 0x3f6), + DEFINE_PROP_UINT32("iobase", ISAIDEState, iobase, 0x1f0), + DEFINE_PROP_UINT32("iobase2", ISAIDEState, iobase2, 0x3f6), DEFINE_PROP_UINT32("irq", ISAIDEState, isairq, 14), DEFINE_PROP_END_OF_LIST(), }; diff --git a/hw/ide/qdev.c b/hw/ide/qdev.c index 18c4b7eca9..6e475e6970 100644 --- a/hw/ide/qdev.c +++ b/hw/ide/qdev.c @@ -206,7 +206,7 @@ static int ide_drive_initfn(IDEDevice *dev) #define DEFINE_IDE_DEV_PROPERTIES() \ DEFINE_BLOCK_PROPERTIES(IDEDrive, dev.conf), \ DEFINE_PROP_STRING("ver", IDEDrive, dev.version), \ - DEFINE_PROP_HEX64("wwn", IDEDrive, dev.wwn, 0), \ + DEFINE_PROP_UINT64("wwn", IDEDrive, dev.wwn, 0), \ DEFINE_PROP_STRING("serial", IDEDrive, dev.serial),\ DEFINE_PROP_STRING("model", IDEDrive, dev.model) diff --git a/hw/intc/i8259_common.c b/hw/intc/i8259_common.c index 9d293999be..61381c463d 100644 --- a/hw/intc/i8259_common.c +++ b/hw/intc/i8259_common.c @@ -123,9 +123,9 @@ static const VMStateDescription vmstate_pic_common = { }; static Property pic_properties_common[] = { - DEFINE_PROP_HEX32("iobase", PICCommonState, iobase, -1), - DEFINE_PROP_HEX32("elcr_addr", PICCommonState, elcr_addr, -1), - DEFINE_PROP_HEX8("elcr_mask", PICCommonState, elcr_mask, -1), + DEFINE_PROP_UINT32("iobase", PICCommonState, iobase, -1), + DEFINE_PROP_UINT32("elcr_addr", PICCommonState, elcr_addr, -1), + DEFINE_PROP_UINT8("elcr_mask", PICCommonState, elcr_mask, -1), DEFINE_PROP_BIT("master", PICCommonState, master, 0, false), DEFINE_PROP_END_OF_LIST(), }; diff --git a/hw/isa/pc87312.c b/hw/isa/pc87312.c index 46a23fb6b4..b352b491ac 100644 --- a/hw/isa/pc87312.c +++ b/hw/isa/pc87312.c @@ -369,7 +369,7 @@ static const VMStateDescription vmstate_pc87312 = { }; static Property pc87312_properties[] = { - DEFINE_PROP_HEX32("iobase", PC87312State, iobase, 0x398), + DEFINE_PROP_UINT32("iobase", PC87312State, iobase, 0x398), DEFINE_PROP_UINT8("config", PC87312State, config, 1), DEFINE_PROP_END_OF_LIST() }; diff --git a/hw/misc/applesmc.c b/hw/misc/applesmc.c index 627adb97c9..6a56b07c6b 100644 --- a/hw/misc/applesmc.c +++ b/hw/misc/applesmc.c @@ -249,7 +249,7 @@ static void applesmc_isa_realize(DeviceState *dev, Error **errp) } static Property applesmc_isa_properties[] = { - DEFINE_PROP_HEX32("iobase", AppleSMCState, iobase, + DEFINE_PROP_UINT32("iobase", AppleSMCState, iobase, APPLESMC_DEFAULT_IOBASE), DEFINE_PROP_STRING("osk", AppleSMCState, osk), DEFINE_PROP_END_OF_LIST(), diff --git a/hw/misc/debugexit.c b/hw/misc/debugexit.c index 9db5680015..69a1b004cb 100644 --- a/hw/misc/debugexit.c +++ b/hw/misc/debugexit.c @@ -47,8 +47,8 @@ static void debug_exit_realizefn(DeviceState *d, Error **errp) } static Property debug_exit_properties[] = { - DEFINE_PROP_HEX32("iobase", ISADebugExitState, iobase, 0x501), - DEFINE_PROP_HEX32("iosize", ISADebugExitState, iosize, 0x02), + DEFINE_PROP_UINT32("iobase", ISADebugExitState, iobase, 0x501), + DEFINE_PROP_UINT32("iosize", ISADebugExitState, iosize, 0x02), DEFINE_PROP_END_OF_LIST(), }; diff --git a/hw/misc/eccmemctl.c b/hw/misc/eccmemctl.c index 96a69d4e5c..549431cb13 100644 --- a/hw/misc/eccmemctl.c +++ b/hw/misc/eccmemctl.c @@ -314,7 +314,7 @@ static int ecc_init1(SysBusDevice *dev) } static Property ecc_properties[] = { - DEFINE_PROP_HEX32("version", ECCState, version, -1), + DEFINE_PROP_UINT32("version", ECCState, version, -1), DEFINE_PROP_END_OF_LIST(), }; diff --git a/hw/net/ne2000-isa.c b/hw/net/ne2000-isa.c index 26b83cef0d..c660e58335 100644 --- a/hw/net/ne2000-isa.c +++ b/hw/net/ne2000-isa.c @@ -86,7 +86,7 @@ static void isa_ne2000_realizefn(DeviceState *dev, Error **errp) } static Property ne2000_isa_properties[] = { - DEFINE_PROP_HEX32("iobase", ISANE2000State, iobase, 0x300), + DEFINE_PROP_UINT32("iobase", ISANE2000State, iobase, 0x300), DEFINE_PROP_UINT32("irq", ISANE2000State, isairq, 9), DEFINE_NIC_PROPERTIES(ISANE2000State, ne2000.c), DEFINE_PROP_END_OF_LIST(), diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c index ee96c1681b..cb36dc2d0c 100644 --- a/hw/nvram/fw_cfg.c +++ b/hw/nvram/fw_cfg.c @@ -584,8 +584,8 @@ static void fw_cfg_realize(DeviceState *dev, Error **errp) } static Property fw_cfg_properties[] = { - DEFINE_PROP_HEX32("ctl_iobase", FWCfgState, ctl_iobase, -1), - DEFINE_PROP_HEX32("data_iobase", FWCfgState, data_iobase, -1), + DEFINE_PROP_UINT32("ctl_iobase", FWCfgState, ctl_iobase, -1), + DEFINE_PROP_UINT32("data_iobase", FWCfgState, data_iobase, -1), DEFINE_PROP_END_OF_LIST(), }; diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index ec00300884..4c7c3aec12 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -651,14 +651,14 @@ static void spapr_phb_reset(DeviceState *qdev) static Property spapr_phb_properties[] = { DEFINE_PROP_INT32("index", sPAPRPHBState, index, -1), - DEFINE_PROP_HEX64("buid", sPAPRPHBState, buid, -1), - DEFINE_PROP_HEX32("liobn", sPAPRPHBState, dma_liobn, -1), - DEFINE_PROP_HEX64("mem_win_addr", sPAPRPHBState, mem_win_addr, -1), - DEFINE_PROP_HEX64("mem_win_size", sPAPRPHBState, mem_win_size, - SPAPR_PCI_MMIO_WIN_SIZE), - DEFINE_PROP_HEX64("io_win_addr", sPAPRPHBState, io_win_addr, -1), - DEFINE_PROP_HEX64("io_win_size", sPAPRPHBState, io_win_size, - SPAPR_PCI_IO_WIN_SIZE), + DEFINE_PROP_UINT64("buid", sPAPRPHBState, buid, -1), + DEFINE_PROP_UINT32("liobn", sPAPRPHBState, dma_liobn, -1), + DEFINE_PROP_UINT64("mem_win_addr", sPAPRPHBState, mem_win_addr, -1), + DEFINE_PROP_UINT64("mem_win_size", sPAPRPHBState, mem_win_size, + SPAPR_PCI_MMIO_WIN_SIZE), + DEFINE_PROP_UINT64("io_win_addr", sPAPRPHBState, io_win_addr, -1), + DEFINE_PROP_UINT64("io_win_size", sPAPRPHBState, io_win_size, + SPAPR_PCI_IO_WIN_SIZE), DEFINE_PROP_END_OF_LIST(), }; diff --git a/hw/scsi/megasas.c b/hw/scsi/megasas.c index 59570e2b2b..e6e1ffd1bb 100644 --- a/hw/scsi/megasas.c +++ b/hw/scsi/megasas.c @@ -2195,7 +2195,7 @@ static Property megasas_properties[] = { DEFINE_PROP_UINT32("max_cmds", MegasasState, fw_cmds, MEGASAS_DEFAULT_FRAMES), DEFINE_PROP_STRING("hba_serial", MegasasState, hba_serial), - DEFINE_PROP_HEX64("sas_address", MegasasState, sas_addr, 0), + DEFINE_PROP_UINT64("sas_address", MegasasState, sas_addr, 0), #ifdef USE_MSIX DEFINE_PROP_BIT("use_msix", MegasasState, flags, MEGASAS_FLAG_USE_MSIX, false), diff --git a/hw/scsi/scsi-disk.c b/hw/scsi/scsi-disk.c index a8d0f15ebe..b4fadd2f24 100644 --- a/hw/scsi/scsi-disk.c +++ b/hw/scsi/scsi-disk.c @@ -2535,7 +2535,7 @@ static Property scsi_hd_properties[] = { SCSI_DISK_F_REMOVABLE, false), DEFINE_PROP_BIT("dpofua", SCSIDiskState, features, SCSI_DISK_F_DPOFUA, false), - DEFINE_PROP_HEX64("wwn", SCSIDiskState, wwn, 0), + DEFINE_PROP_UINT64("wwn", SCSIDiskState, wwn, 0), DEFINE_PROP_UINT64("max_unmap_size", SCSIDiskState, max_unmap_size, DEFAULT_MAX_UNMAP_SIZE), DEFINE_BLOCK_CHS_PROPERTIES(SCSIDiskState, qdev.conf), @@ -2583,7 +2583,7 @@ static const TypeInfo scsi_hd_info = { static Property scsi_cd_properties[] = { DEFINE_SCSI_DISK_PROPERTIES(), - DEFINE_PROP_HEX64("wwn", SCSIDiskState, wwn, 0), + DEFINE_PROP_UINT64("wwn", SCSIDiskState, wwn, 0), DEFINE_PROP_END_OF_LIST(), }; @@ -2646,7 +2646,7 @@ static Property scsi_disk_properties[] = { SCSI_DISK_F_REMOVABLE, false), DEFINE_PROP_BIT("dpofua", SCSIDiskState, features, SCSI_DISK_F_DPOFUA, false), - DEFINE_PROP_HEX64("wwn", SCSIDiskState, wwn, 0), + DEFINE_PROP_UINT64("wwn", SCSIDiskState, wwn, 0), DEFINE_PROP_UINT64("max_unmap_size", SCSIDiskState, max_unmap_size, DEFAULT_MAX_UNMAP_SIZE), DEFINE_PROP_END_OF_LIST(), diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 0906a1d62b..027a6fa369 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -1234,9 +1234,9 @@ const VMStateDescription sdhci_vmstate = { /* Capabilities registers provide information on supported features of this * specific host controller implementation */ static Property sdhci_properties[] = { - DEFINE_PROP_HEX32("capareg", SDHCIState, capareg, + DEFINE_PROP_UINT32("capareg", SDHCIState, capareg, SDHC_CAPAB_REG_DEFAULT), - DEFINE_PROP_HEX32("maxcurr", SDHCIState, maxcurr, 0), + DEFINE_PROP_UINT32("maxcurr", SDHCIState, maxcurr, 0), DEFINE_PROP_END_OF_LIST(), }; diff --git a/hw/timer/i8254.c b/hw/timer/i8254.c index cdbf481951..28152d88ea 100644 --- a/hw/timer/i8254.c +++ b/hw/timer/i8254.c @@ -342,7 +342,7 @@ static void pit_realizefn(DeviceState *dev, Error **err) } static Property pit_properties[] = { - DEFINE_PROP_HEX32("iobase", PITCommonState, iobase, -1), + DEFINE_PROP_UINT32("iobase", PITCommonState, iobase, -1), DEFINE_PROP_END_OF_LIST(), }; diff --git a/hw/timer/m48t59.c b/hw/timer/m48t59.c index 3cfb18a8b3..7cf868445f 100644 --- a/hw/timer/m48t59.c +++ b/hw/timer/m48t59.c @@ -741,7 +741,7 @@ static int m48t59_init1(SysBusDevice *dev) static Property m48t59_isa_properties[] = { DEFINE_PROP_UINT32("size", M48t59ISAState, state.size, -1), DEFINE_PROP_UINT32("model", M48t59ISAState, state.model, -1), - DEFINE_PROP_HEX32( "io_base", M48t59ISAState, state.io_base, 0), + DEFINE_PROP_UINT32("io_base", M48t59ISAState, state.io_base, 0), DEFINE_PROP_END_OF_LIST(), }; @@ -766,7 +766,7 @@ static const TypeInfo m48t59_isa_info = { static Property m48t59_properties[] = { DEFINE_PROP_UINT32("size", M48t59SysBusState, state.size, -1), DEFINE_PROP_UINT32("model", M48t59SysBusState, state.model, -1), - DEFINE_PROP_HEX32( "io_base", M48t59SysBusState, state.io_base, 0), + DEFINE_PROP_UINT32("io_base", M48t59SysBusState, state.io_base, 0), DEFINE_PROP_END_OF_LIST(), }; diff --git a/hw/usb/host-libusb.c b/hw/usb/host-libusb.c index fd320cd8aa..57bed09a1e 100644 --- a/hw/usb/host-libusb.c +++ b/hw/usb/host-libusb.c @@ -1324,8 +1324,8 @@ static Property usb_host_dev_properties[] = { DEFINE_PROP_UINT32("hostbus", USBHostDevice, match.bus_num, 0), DEFINE_PROP_UINT32("hostaddr", USBHostDevice, match.addr, 0), DEFINE_PROP_STRING("hostport", USBHostDevice, match.port), - DEFINE_PROP_HEX32("vendorid", USBHostDevice, match.vendor_id, 0), - DEFINE_PROP_HEX32("productid", USBHostDevice, match.product_id, 0), + DEFINE_PROP_UINT32("vendorid", USBHostDevice, match.vendor_id, 0), + DEFINE_PROP_UINT32("productid", USBHostDevice, match.product_id, 0), DEFINE_PROP_UINT32("isobufs", USBHostDevice, iso_urb_count, 4), DEFINE_PROP_UINT32("isobsize", USBHostDevice, iso_urb_frames, 32), DEFINE_PROP_INT32("bootindex", USBHostDevice, bootindex, -1), diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c index 30c9f2b698..7b91841a1d 100644 --- a/hw/virtio/virtio-pci.c +++ b/hw/virtio/virtio-pci.c @@ -1063,7 +1063,7 @@ static const TypeInfo virtio_pci_info = { /* virtio-blk-pci */ static Property virtio_blk_pci_properties[] = { - DEFINE_PROP_HEX32("class", VirtIOPCIProxy, class_code, 0), + DEFINE_PROP_UINT32("class", VirtIOPCIProxy, class_code, 0), DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags, VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true), DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2), @@ -1275,7 +1275,7 @@ static void balloon_pci_stats_set_poll_interval(Object *obj, struct Visitor *v, static Property virtio_balloon_pci_properties[] = { DEFINE_VIRTIO_COMMON_FEATURES(VirtIOPCIProxy, host_features), - DEFINE_PROP_HEX32("class", VirtIOPCIProxy, class_code, 0), + DEFINE_PROP_UINT32("class", VirtIOPCIProxy, class_code, 0), DEFINE_PROP_END_OF_LIST(), }; @@ -1376,7 +1376,7 @@ static Property virtio_serial_pci_properties[] = { DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags, VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true), DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2), - DEFINE_PROP_HEX32("class", VirtIOPCIProxy, class_code, 0), + DEFINE_PROP_UINT32("class", VirtIOPCIProxy, class_code, 0), DEFINE_VIRTIO_COMMON_FEATURES(VirtIOPCIProxy, host_features), DEFINE_VIRTIO_SERIAL_PROPERTIES(VirtIOSerialPCI, vdev.serial), DEFINE_PROP_END_OF_LIST(), -- cgit v1.2.1 From f31c41ff5e7d64680382e94b9ea35d52ab4ca045 Mon Sep 17 00:00:00 2001 From: Paolo Bonzini Date: Sat, 8 Feb 2014 11:01:54 +0100 Subject: block: Handle "rechs" and "large" translation options MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sure, CHS translation is an obscure topic, and legacy options for hard-disk geometries are obscure as well. But since QEMU does nothing with it except telling the BIOS, and since there "large" and "rechs" are listed in the enums, parsing them seems to be the bare minimum. Acked-by: Stefan Hajnoczi Reviewed-by: Igor Mammedov Reviewed-by: Eric Blake Signed-off-by: Paolo Bonzini Signed-off-by: Andreas Färber --- hw/core/qdev-properties.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'hw') diff --git a/hw/core/qdev-properties.c b/hw/core/qdev-properties.c index 2c3a756305..76a0c4dd11 100644 --- a/hw/core/qdev-properties.c +++ b/hw/core/qdev-properties.c @@ -469,9 +469,11 @@ PropertyInfo qdev_prop_losttickpolicy = { /* --- BIOS CHS translation */ static const char *bios_chs_trans_table[] = { - [BIOS_ATA_TRANSLATION_AUTO] = "auto", - [BIOS_ATA_TRANSLATION_NONE] = "none", - [BIOS_ATA_TRANSLATION_LBA] = "lba", + [BIOS_ATA_TRANSLATION_AUTO] = "auto", + [BIOS_ATA_TRANSLATION_NONE] = "none", + [BIOS_ATA_TRANSLATION_LBA] = "lba", + [BIOS_ATA_TRANSLATION_LARGE] = "large", + [BIOS_ATA_TRANSLATION_RECHS] = "rechs", }; PropertyInfo qdev_prop_bios_chs_trans = { -- cgit v1.2.1 From 104059da546c5cae03767c519013704d0baa0896 Mon Sep 17 00:00:00 2001 From: Paolo Bonzini Date: Sat, 8 Feb 2014 11:01:55 +0100 Subject: qdev: Add enum property types to QAPI schema MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Reviewed-by: Igor Mammedov Reviewed-by: Eric Blake Signed-off-by: Paolo Bonzini Signed-off-by: Andreas Färber --- hw/core/qdev-properties.c | 20 +++----------------- hw/i386/kvm/i8254.c | 6 +++--- hw/timer/mc146818rtc.c | 14 +++++++------- 3 files changed, 13 insertions(+), 27 deletions(-) (limited to 'hw') diff --git a/hw/core/qdev-properties.c b/hw/core/qdev-properties.c index 76a0c4dd11..0a2ca058dc 100644 --- a/hw/core/qdev-properties.c +++ b/hw/core/qdev-properties.c @@ -449,36 +449,22 @@ PropertyInfo qdev_prop_macaddr = { /* --- lost tick policy --- */ -static const char *lost_tick_policy_table[LOST_TICK_MAX+1] = { - [LOST_TICK_DISCARD] = "discard", - [LOST_TICK_DELAY] = "delay", - [LOST_TICK_MERGE] = "merge", - [LOST_TICK_SLEW] = "slew", - [LOST_TICK_MAX] = NULL, -}; - QEMU_BUILD_BUG_ON(sizeof(LostTickPolicy) != sizeof(int)); PropertyInfo qdev_prop_losttickpolicy = { .name = "LostTickPolicy", - .enum_table = lost_tick_policy_table, + .enum_table = LostTickPolicy_lookup, .get = get_enum, .set = set_enum, }; /* --- BIOS CHS translation */ -static const char *bios_chs_trans_table[] = { - [BIOS_ATA_TRANSLATION_AUTO] = "auto", - [BIOS_ATA_TRANSLATION_NONE] = "none", - [BIOS_ATA_TRANSLATION_LBA] = "lba", - [BIOS_ATA_TRANSLATION_LARGE] = "large", - [BIOS_ATA_TRANSLATION_RECHS] = "rechs", -}; +QEMU_BUILD_BUG_ON(sizeof(BiosAtaTranslation) != sizeof(int)); PropertyInfo qdev_prop_bios_chs_trans = { .name = "bios-chs-trans", - .enum_table = bios_chs_trans_table, + .enum_table = BiosAtaTranslation_lookup, .get = get_enum, .set = set_enum, }; diff --git a/hw/i386/kvm/i8254.c b/hw/i386/kvm/i8254.c index f8f302109a..59373aaade 100644 --- a/hw/i386/kvm/i8254.c +++ b/hw/i386/kvm/i8254.c @@ -268,9 +268,9 @@ static void kvm_pit_realizefn(DeviceState *dev, Error **errp) return; } switch (s->lost_tick_policy) { - case LOST_TICK_DELAY: + case LOST_TICK_POLICY_DELAY: break; /* enabled by default */ - case LOST_TICK_DISCARD: + case LOST_TICK_POLICY_DISCARD: if (kvm_check_extension(kvm_state, KVM_CAP_REINJECT_CONTROL)) { struct kvm_reinject_control control = { .pit_reinject = 0 }; @@ -300,7 +300,7 @@ static void kvm_pit_realizefn(DeviceState *dev, Error **errp) static Property kvm_pit_properties[] = { DEFINE_PROP_UINT32("iobase", PITCommonState, iobase, -1), DEFINE_PROP_LOSTTICKPOLICY("lost_tick_policy", KVMPITState, - lost_tick_policy, LOST_TICK_DELAY), + lost_tick_policy, LOST_TICK_POLICY_DELAY), DEFINE_PROP_END_OF_LIST(), }; diff --git a/hw/timer/mc146818rtc.c b/hw/timer/mc146818rtc.c index 6fb124fead..8509309fa7 100644 --- a/hw/timer/mc146818rtc.c +++ b/hw/timer/mc146818rtc.c @@ -185,7 +185,7 @@ static void rtc_periodic_timer(void *opaque) if (s->cmos_data[RTC_REG_B] & REG_B_PIE) { s->cmos_data[RTC_REG_C] |= REG_C_IRQF; #ifdef TARGET_I386 - if (s->lost_tick_policy == LOST_TICK_SLEW) { + if (s->lost_tick_policy == LOST_TICK_POLICY_SLEW) { if (s->irq_reinject_on_ack_count >= RTC_REINJECT_ON_ACK_COUNT) s->irq_reinject_on_ack_count = 0; apic_reset_irq_delivered(); @@ -708,7 +708,7 @@ static int rtc_post_load(void *opaque, int version_id) #ifdef TARGET_I386 if (version_id >= 2) { - if (s->lost_tick_policy == LOST_TICK_SLEW) { + if (s->lost_tick_policy == LOST_TICK_POLICY_SLEW) { rtc_coalesced_timer_update(s); } } @@ -749,7 +749,7 @@ static void rtc_notify_clock_reset(Notifier *notifier, void *data) periodic_timer_update(s, now); check_update_timer(s); #ifdef TARGET_I386 - if (s->lost_tick_policy == LOST_TICK_SLEW) { + if (s->lost_tick_policy == LOST_TICK_POLICY_SLEW) { rtc_coalesced_timer_update(s); } #endif @@ -774,7 +774,7 @@ static void rtc_reset(void *opaque) qemu_irq_lower(s->irq); #ifdef TARGET_I386 - if (s->lost_tick_policy == LOST_TICK_SLEW) { + if (s->lost_tick_policy == LOST_TICK_POLICY_SLEW) { s->irq_coalesced = 0; } #endif @@ -835,11 +835,11 @@ static void rtc_realizefn(DeviceState *dev, Error **errp) #ifdef TARGET_I386 switch (s->lost_tick_policy) { - case LOST_TICK_SLEW: + case LOST_TICK_POLICY_SLEW: s->coalesced_timer = timer_new_ns(rtc_clock, rtc_coalesced_timer, s); break; - case LOST_TICK_DISCARD: + case LOST_TICK_POLICY_DISCARD: break; default: error_setg(errp, "Invalid lost tick policy."); @@ -890,7 +890,7 @@ ISADevice *rtc_init(ISABus *bus, int base_year, qemu_irq intercept_irq) static Property mc146818rtc_properties[] = { DEFINE_PROP_INT32("base_year", RTCState, base_year, 1980), DEFINE_PROP_LOSTTICKPOLICY("lost_tick_policy", RTCState, - lost_tick_policy, LOST_TICK_DISCARD), + lost_tick_policy, LOST_TICK_POLICY_DISCARD), DEFINE_PROP_END_OF_LIST(), }; -- cgit v1.2.1 From 85ca1202d1227b3a816c714db6c8e19b613172c5 Mon Sep 17 00:00:00 2001 From: Paolo Bonzini Date: Sat, 8 Feb 2014 11:01:56 +0100 Subject: qdev: Use QAPI type names for properties MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Use "drive", "chr", etc. only for legacy_name (which shows up in -device foo,? output). Reviewed-by: Igor Mammedov Reviewed-by: Eric Blake Signed-off-by: Paolo Bonzini Signed-off-by: Andreas Färber --- hw/core/qdev-properties-system.c | 12 ++++++++---- hw/core/qdev-properties.c | 18 +++++++++++------- 2 files changed, 19 insertions(+), 11 deletions(-) (limited to 'hw') diff --git a/hw/core/qdev-properties-system.c b/hw/core/qdev-properties-system.c index 3f29b49ca4..5f5957ed8e 100644 --- a/hw/core/qdev-properties-system.c +++ b/hw/core/qdev-properties-system.c @@ -109,7 +109,8 @@ static void set_drive(Object *obj, Visitor *v, void *opaque, } PropertyInfo qdev_prop_drive = { - .name = "drive", + .name = "str", + .legacy_name = "drive", .get = get_drive, .set = set_drive, .release = release_drive, @@ -164,7 +165,8 @@ static void set_chr(Object *obj, Visitor *v, void *opaque, } PropertyInfo qdev_prop_chr = { - .name = "chr", + .name = "str", + .legacy_name = "chr", .get = get_chr, .set = set_chr, .release = release_chr, @@ -242,7 +244,8 @@ static void set_netdev(Object *obj, Visitor *v, void *opaque, } PropertyInfo qdev_prop_netdev = { - .name = "netdev", + .name = "str", + .legacy_name = "netdev", .get = get_netdev, .set = set_netdev, }; @@ -321,7 +324,8 @@ static void set_vlan(Object *obj, Visitor *v, void *opaque, } PropertyInfo qdev_prop_vlan = { - .name = "vlan", + .name = "int32", + .legacy_name = "vlan", .print = print_vlan, .get = get_vlan, .set = set_vlan, diff --git a/hw/core/qdev-properties.c b/hw/core/qdev-properties.c index 0a2ca058dc..77d0c66635 100644 --- a/hw/core/qdev-properties.c +++ b/hw/core/qdev-properties.c @@ -107,7 +107,7 @@ static void prop_set_bit(Object *obj, Visitor *v, void *opaque, } PropertyInfo qdev_prop_bit = { - .name = "boolean", + .name = "bool", .legacy_name = "on/off", .get = prop_get_bit, .set = prop_set_bit, @@ -141,7 +141,7 @@ static void set_bool(Object *obj, Visitor *v, void *opaque, } PropertyInfo qdev_prop_bool = { - .name = "boolean", + .name = "bool", .get = get_bool, .set = set_bool, }; @@ -358,7 +358,7 @@ static void set_string(Object *obj, Visitor *v, void *opaque, } PropertyInfo qdev_prop_string = { - .name = "string", + .name = "str", .release = release_string, .get = get_string, .set = set_string, @@ -442,7 +442,8 @@ inval: } PropertyInfo qdev_prop_macaddr = { - .name = "macaddr", + .name = "str", + .legacy_name = "macaddr", .get = get_mac, .set = set_mac, }; @@ -463,7 +464,8 @@ PropertyInfo qdev_prop_losttickpolicy = { QEMU_BUILD_BUG_ON(sizeof(BiosAtaTranslation) != sizeof(int)); PropertyInfo qdev_prop_bios_chs_trans = { - .name = "bios-chs-trans", + .name = "BiosAtaTranslation", + .legacy_name = "bios-chs-trans", .enum_table = BiosAtaTranslation_lookup, .get = get_enum, .set = set_enum, @@ -582,7 +584,8 @@ static void set_blocksize(Object *obj, Visitor *v, void *opaque, } PropertyInfo qdev_prop_blocksize = { - .name = "blocksize", + .name = "uint16", + .legacy_name = "blocksize", .get = get_uint16, .set = set_blocksize, }; @@ -689,7 +692,8 @@ inval: } PropertyInfo qdev_prop_pci_host_devaddr = { - .name = "pci-host-devaddr", + .name = "str", + .legacy_name = "pci-host-devaddr", .get = get_pci_host_devaddr, .set = set_pci_host_devaddr, }; -- cgit v1.2.1