From efee734004c42ba185098086e5185d8a85ed02af Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Mon, 26 Aug 2013 05:39:29 +0200 Subject: cpu: Move icount_extra field from CPU_COMMON to CPUState MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Reset it. Signed-off-by: Andreas Färber --- include/exec/cpu-defs.h | 1 - include/qom/cpu.h | 2 ++ 2 files changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h index 068b6c168f..8f9871c40e 100644 --- a/include/exec/cpu-defs.h +++ b/include/exec/cpu-defs.h @@ -149,7 +149,6 @@ typedef struct CPUWatchpoint { CPU_COMMON_TLB \ struct TranslationBlock *tb_jmp_cache[TB_JMP_CACHE_SIZE]; \ \ - int64_t icount_extra; /* Instructions until next timer event. */ \ /* Number of cycles left, with interrupt flag in high bit. \ This allows a single read-compare-cbranch-write sequence to test \ for both decrementer underflow and exceptions. */ \ diff --git a/include/qom/cpu.h b/include/qom/cpu.h index f80036e99b..012a7e6e79 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -157,6 +157,7 @@ struct kvm_run; * @tcg_exit_req: Set to force TCG to stop executing linked TBs for this * CPU and return to its top level loop. * @singlestep_enabled: Flags for single-stepping. + * @icount_extra: Instructions until next timer event. * @can_do_io: Nonzero if memory-mapped IO is safe. * @env_ptr: Pointer to subclass-specific CPUArchState field. * @current_tb: Currently executing TB. @@ -196,6 +197,7 @@ struct CPUState { volatile sig_atomic_t tcg_exit_req; uint32_t interrupt_request; int singlestep_enabled; + int64_t icount_extra; AddressSpace *as; MemoryListener *tcg_as_listener; -- cgit v1.2.1