From fb6c91ba2bb0b1c1b8662ceeeeb9474a025f9a6b Mon Sep 17 00:00:00 2001 From: Greg Bellows Date: Thu, 11 Dec 2014 12:07:52 +0000 Subject: target-arm: make VBAR banked When EL3 is running in Aarch32 (or ARMv7 with Security Extensions) VBAR has a secure and a non-secure instance, which are mapped to VBAR_EL1 and VBAR_EL3. Signed-off-by: Fabian Aggeler Signed-off-by: Greg Bellows Reviewed-by: Peter Maydell Message-id: 1416242878-876-24-git-send-email-greg.bellows@linaro.org Signed-off-by: Peter Maydell --- target-arm/cpu.h | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) (limited to 'target-arm/cpu.h') diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 2f8d607ffa..fc6449750f 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -297,7 +297,15 @@ typedef struct CPUARMState { uint32_t c9_pmuserenr; /* perf monitor user enable */ uint32_t c9_pminten; /* perf monitor interrupt enables */ uint64_t mair_el1; - uint64_t vbar_el[4]; /* vector base address register */ + union { /* vector base address register */ + struct { + uint64_t _unused_vbar; + uint64_t vbar_ns; + uint64_t hvbar; + uint64_t vbar_s; + }; + uint64_t vbar_el[4]; + }; uint32_t mvbar; /* (monitor) vector base address register */ uint32_t c13_fcse; /* FCSE PID. */ uint64_t contextidr_el1; /* Context ID. */ -- cgit v1.2.1