From 0a2461fa49e4d2aeb846390e1eb1bdb9e8196ca4 Mon Sep 17 00:00:00 2001 From: Alexander Graf Date: Tue, 3 Sep 2013 20:12:05 +0100 Subject: target-arm: Fix target_ulong/uint32_t confusions Correct a few places that were using uint32_t or a 32 bit only format string to handle something that should be a target_ulong. Signed-off-by: Alexander Graf Signed-off-by: John Rigby Signed-off-by: Peter Maydell Message-id: 1378235544-22290-6-git-send-email-peter.maydell@linaro.org [PMM: split out to separate patch; added gen_goto_tb() and gen_set_pc_im() dest params to list of things to change.] Signed-off-by: Peter Maydell --- target-arm/translate.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) (limited to 'target-arm/translate.c') diff --git a/target-arm/translate.c b/target-arm/translate.c index 2605833685..ca411b395c 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -905,7 +905,7 @@ DO_GEN_ST(st8) DO_GEN_ST(st16) DO_GEN_ST(st32) -static inline void gen_set_pc_im(uint32_t val) +static inline void gen_set_pc_im(target_ulong val) { tcg_gen_movi_i32(cpu_R[15], val); } @@ -3413,7 +3413,7 @@ static int disas_vfp_insn(CPUARMState * env, DisasContext *s, uint32_t insn) return 0; } -static inline void gen_goto_tb(DisasContext *s, int n, uint32_t dest) +static inline void gen_goto_tb(DisasContext *s, int n, target_ulong dest) { TranslationBlock *tb; @@ -9997,7 +9997,7 @@ static inline void gen_intermediate_code_internal(ARMCPU *cpu, uint16_t *gen_opc_end; int j, lj; target_ulong pc_start; - uint32_t next_page_start; + target_ulong next_page_start; int num_insns; int max_insns; @@ -10151,7 +10151,8 @@ static inline void gen_intermediate_code_internal(ARMCPU *cpu, } if (tcg_check_temp_count()) { - fprintf(stderr, "TCG temporary leak before %08x\n", dc->pc); + fprintf(stderr, "TCG temporary leak before "TARGET_FMT_lx"\n", + dc->pc); } /* Translation stops when a conditional branch is encountered. -- cgit v1.2.1