From c5fad12fa08228d0c2f04089ba0cd27718f1b723 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Fri, 20 Apr 2012 07:39:15 +0000 Subject: target-arm: Move A9 config_base_address reset value to ARMCPU MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Move the A9 config_base_address cp15 register reset value to ARMCPU. This should become a QOM property so that the Highbank board can set it without having to pull in cpu-qom.h, but at least this avoids the implicit dependency on reset ordering that the previous workaround had. Cc: Mark Langsdorf Signed-off-by: Peter Maydell Signed-off-by: Andreas Färber --- target-arm/cpu-qom.h | 1 + target-arm/cpu.c | 4 +--- 2 files changed, 2 insertions(+), 3 deletions(-) (limited to 'target-arm') diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h index 2891521df4..a61c68d21b 100644 --- a/target-arm/cpu-qom.h +++ b/target-arm/cpu-qom.h @@ -93,6 +93,7 @@ typedef struct ARMCPU { * in the order L1DCache, L1ICache, L2DCache, L2ICache, etc. */ uint32_t ccsidr[16]; + uint32_t reset_cbar; } ARMCPU; static inline ARMCPU *arm_env_get_cpu(CPUARMState *env) diff --git a/target-arm/cpu.c b/target-arm/cpu.c index 2e0eccd03a..7eb323ae4d 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -30,7 +30,6 @@ static void arm_cpu_reset(CPUState *s) ARMCPU *cpu = ARM_CPU(s); ARMCPUClass *acc = ARM_CPU_GET_CLASS(cpu); CPUARMState *env = &cpu->env; - uint32_t tmp = 0; if (qemu_loglevel_mask(CPU_LOG_RESET)) { qemu_log("CPU Reset (CPU %d)\n", env->cpu_index); @@ -39,9 +38,8 @@ static void arm_cpu_reset(CPUState *s) acc->parent_reset(s); - tmp = env->cp15.c15_config_base_address; memset(env, 0, offsetof(CPUARMState, breakpoints)); - env->cp15.c15_config_base_address = tmp; + env->cp15.c15_config_base_address = cpu->reset_cbar; env->cp15.c0_cpuid = cpu->midr; env->vfp.xregs[ARM_VFP_FPSID] = cpu->reset_fpsid; env->vfp.xregs[ARM_VFP_MVFR0] = cpu->mvfr0; -- cgit v1.2.1