From cecd8504b80148b66cdc1ce32046429bc3549090 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Thu, 6 Jan 2011 19:37:55 +0000 Subject: target-arm: wire up the softfloat flush_input_to_zero flag Wire up the new softfloat support for flushing input denormals to zero on ARM. The FPSCR FZ bit enables flush-to-zero for both inputs and outputs, but the reporting of when inputs are flushed to zero is via a separate IDC bit rather than the UFC (underflow) bit used when output denormals are flushed to zero. Signed-off-by: Peter Maydell Acked-by: Aurelien Jarno Signed-off-by: Aurelien Jarno --- target-arm/helper.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'target-arm') diff --git a/target-arm/helper.c b/target-arm/helper.c index 05684a2f45..705b99f9cb 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -2242,6 +2242,8 @@ static inline int vfp_exceptbits_from_host(int host_bits) target_bits |= 8; if (host_bits & float_flag_inexact) target_bits |= 0x10; + if (host_bits & float_flag_input_denormal) + target_bits |= 0x80; return target_bits; } @@ -2278,6 +2280,8 @@ static inline int vfp_exceptbits_to_host(int target_bits) host_bits |= float_flag_underflow; if (target_bits & 0x10) host_bits |= float_flag_inexact; + if (target_bits & 0x80) + host_bits |= float_flag_input_denormal; return host_bits; } @@ -2310,8 +2314,10 @@ void HELPER(vfp_set_fpscr)(CPUState *env, uint32_t val) } set_float_rounding_mode(i, &env->vfp.fp_status); } - if (changed & (1 << 24)) + if (changed & (1 << 24)) { set_flush_to_zero((val & (1 << 24)) != 0, &env->vfp.fp_status); + set_flush_inputs_to_zero((val & (1 << 24)) != 0, &env->vfp.fp_status); + } if (changed & (1 << 25)) set_default_nan_mode((val & (1 << 25)) != 0, &env->vfp.fp_status); -- cgit v1.2.1