From 33c263df7f87ca0cd170a6017a668205488ab010 Mon Sep 17 00:00:00 2001 From: bellard Date: Wed, 4 Jun 2008 17:39:33 +0000 Subject: SVM: added tsc_offset git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4668 c046a42c-6fe2-441c-8c8c-71466251a162 --- target-i386/cpu.h | 7 ++++--- target-i386/op_helper.c | 5 ++++- 2 files changed, 8 insertions(+), 4 deletions(-) (limited to 'target-i386') diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 9f60738e8e..18cb6addd7 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -119,9 +119,9 @@ #define ID_MASK 0x00200000 /* hidden flags - used internally by qemu to represent additional cpu - states. Only the CPL and INHIBIT_IRQ are not redundant. We avoid - using the IOPL_MASK, TF_MASK and VM_MASK bit position to ease oring - with eflags. */ + states. Only the CPL, INHIBIT_IRQ, SMM and SVMI are not + redundant. We avoid using the IOPL_MASK, TF_MASK and VM_MASK bit + position to ease oring with eflags. */ /* current cpl */ #define HF_CPL_SHIFT 0 /* true if soft mmu is being used */ @@ -543,6 +543,7 @@ typedef struct CPUX86State { target_phys_addr_t vm_hsave; target_phys_addr_t vm_vmcb; + uint64_t tsc_offset; uint64_t intercept; uint16_t intercept_cr_read; uint16_t intercept_cr_write; diff --git a/target-i386/op_helper.c b/target-i386/op_helper.c index 810c4665f3..ebeeebdecd 100644 --- a/target-i386/op_helper.c +++ b/target-i386/op_helper.c @@ -3005,7 +3005,7 @@ void helper_rdtsc(void) } helper_svm_check_intercept_param(SVM_EXIT_RDTSC, 0); - val = cpu_get_tsc(env); + val = cpu_get_tsc(env) + env->tsc_offset; EAX = (uint32_t)(val); EDX = (uint32_t)(val >> 32); } @@ -4851,6 +4851,8 @@ void helper_vmrun(int aflag, int next_eip_addend) /* enable intercepts */ env->hflags |= HF_SVMI_MASK; + env->tsc_offset = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, control.tsc_offset)); + env->gdt.base = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, save.gdtr.base)); env->gdt.limit = ldl_phys(env->vm_vmcb + offsetof(struct vmcb, save.gdtr.limit)); @@ -5226,6 +5228,7 @@ void helper_vmexit(uint32_t exit_code, uint64_t exit_info_1) env->intercept = 0; env->intercept_exceptions = 0; env->interrupt_request &= ~CPU_INTERRUPT_VIRQ; + env->tsc_offset = 0; env->gdt.base = ldq_phys(env->vm_hsave + offsetof(struct vmcb, save.gdtr.base)); env->gdt.limit = ldl_phys(env->vm_hsave + offsetof(struct vmcb, save.gdtr.limit)); -- cgit v1.2.1