From 97577fd4c31777780a22b77afa4590086ac962c7 Mon Sep 17 00:00:00 2001 From: James Hogan Date: Tue, 27 Aug 2013 12:19:10 +0100 Subject: cpu: Move cpu state syncs up into cpu_dump_state() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The x86 and ppc targets call cpu_synchronize_state() from their *_cpu_dump_state() callbacks to ensure that up to date state is dumped when KVM is enabled (for example when a KVM internal error occurs). Move this call up into the generic cpu_dump_state() function so that other KVM targets (namely MIPS) can take advantage of it. This requires kvm_cpu_synchronize_state() and cpu_synchronize_state() to be moved out of the #ifdef NEED_CPU_H in so that they're accessible to qom/cpu.c. Signed-off-by: James Hogan Cc: Andreas Färber Cc: Alexander Graf Cc: Gleb Natapov Cc: qemu-ppc@nongnu.org Cc: kvm@vger.kernel.org Signed-off-by: Gleb Natapov --- target-i386/helper.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'target-i386') diff --git a/target-i386/helper.c b/target-i386/helper.c index 7c58e274d9..0ad7c8e3b6 100644 --- a/target-i386/helper.c +++ b/target-i386/helper.c @@ -188,8 +188,6 @@ void x86_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, char cc_op_name[32]; static const char *seg_name[6] = { "ES", "CS", "SS", "DS", "FS", "GS" }; - cpu_synchronize_state(cs); - eflags = cpu_compute_eflags(env); #ifdef TARGET_X86_64 if (env->hflags & HF_CS64_MASK) { -- cgit v1.2.1 From 0e5035776df31380a44a1a851850d110b551ecb6 Mon Sep 17 00:00:00 2001 From: Marcelo Tosatti Date: Tue, 3 Sep 2013 18:55:16 -0300 Subject: fix steal time MSR vmsd callback to proper opaque type Convert steal time MSR vmsd callback pointer to proper X86CPU type. Signed-off-by: Marcelo Tosatti Signed-off-by: Paolo Bonzini --- target-i386/machine.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'target-i386') diff --git a/target-i386/machine.c b/target-i386/machine.c index dc81cde535..e568da2ba4 100644 --- a/target-i386/machine.c +++ b/target-i386/machine.c @@ -330,9 +330,9 @@ static bool pv_eoi_msr_needed(void *opaque) static bool steal_time_msr_needed(void *opaque) { - CPUX86State *cpu = opaque; + X86CPU *cpu = opaque; - return cpu->steal_time_msr != 0; + return cpu->env.steal_time_msr != 0; } static const VMStateDescription vmstate_steal_time_msr = { @@ -341,7 +341,7 @@ static const VMStateDescription vmstate_steal_time_msr = { .minimum_version_id = 1, .minimum_version_id_old = 1, .fields = (VMStateField []) { - VMSTATE_UINT64(steal_time_msr, CPUX86State), + VMSTATE_UINT64(env.steal_time_msr, X86CPU), VMSTATE_END_OF_LIST() } }; -- cgit v1.2.1 From 787aaf5703a702094f395db6795e74230282cd62 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Beno=C3=AEt=20Canet?= Date: Mon, 2 Sep 2013 17:06:37 +0200 Subject: target-i386: forward CPUID cache leaves when -cpu host is used MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Some users running cpu intensive tasks checking the cache CPUID leaves at startup and making decisions based on the result reported that the guest was not reflecting the host CPUID leaves when -cpu host is used. This patch fix this. Signed-off-by: Benoît Canet [Rename new field to cache_info_passthrough - Paolo] Signed-off-by: Paolo Bonzini --- target-i386/cpu-qom.h | 3 +++ target-i386/cpu.c | 19 +++++++++++++++++++ 2 files changed, 22 insertions(+) (limited to 'target-i386') diff --git a/target-i386/cpu-qom.h b/target-i386/cpu-qom.h index c4447c2b6e..f4fab155bd 100644 --- a/target-i386/cpu-qom.h +++ b/target-i386/cpu-qom.h @@ -70,6 +70,9 @@ typedef struct X86CPU { bool hyperv_relaxed_timing; int hyperv_spinlock_attempts; + /* if true the CPUID code directly forward host cache leaves to the guest */ + bool cache_info_passthrough; + /* Features that were filtered out because of missing host capabilities */ uint32_t filtered_features[FEATURE_WORDS]; diff --git a/target-i386/cpu.c b/target-i386/cpu.c index c36345e426..46edd757f3 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -486,6 +486,7 @@ typedef struct x86_def_t { int stepping; FeatureWordArray features; char model_id[48]; + bool cache_info_passthrough; } x86_def_t; #define I486_FEATURES (CPUID_FP87 | CPUID_VME | CPUID_PSE) @@ -1139,6 +1140,7 @@ static void kvm_cpu_fill_host(x86_def_t *x86_cpu_def) assert(kvm_enabled()); x86_cpu_def->name = "host"; + x86_cpu_def->cache_info_passthrough = true; host_cpuid(0x0, 0, &eax, &ebx, &ecx, &edx); x86_cpu_vendor_words2str(x86_cpu_def->vendor, ebx, edx, ecx); @@ -1888,6 +1890,7 @@ static void cpu_x86_register(X86CPU *cpu, const char *name, Error **errp) env->features[FEAT_C000_0001_EDX] = def->features[FEAT_C000_0001_EDX]; env->features[FEAT_7_0_EBX] = def->features[FEAT_7_0_EBX]; env->cpuid_xlevel2 = def->xlevel2; + cpu->cache_info_passthrough = def->cache_info_passthrough; object_property_set_str(OBJECT(cpu), def->model_id, "model-id", errp); } @@ -2062,6 +2065,10 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, break; case 2: /* cache info: needed for Pentium Pro compatibility */ + if (cpu->cache_info_passthrough) { + host_cpuid(index, 0, eax, ebx, ecx, edx); + break; + } *eax = 1; /* Number of CPUID[EAX=2] calls required */ *ebx = 0; *ecx = 0; @@ -2071,6 +2078,10 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, break; case 4: /* cache info: needed for Core compatibility */ + if (cpu->cache_info_passthrough) { + host_cpuid(index, count, eax, ebx, ecx, edx); + break; + } if (cs->nr_cores > 1) { *eax = (cs->nr_cores - 1) << 26; } else { @@ -2228,6 +2239,10 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, break; case 0x80000005: /* cache info (L1 cache) */ + if (cpu->cache_info_passthrough) { + host_cpuid(index, 0, eax, ebx, ecx, edx); + break; + } *eax = (L1_DTLB_2M_ASSOC << 24) | (L1_DTLB_2M_ENTRIES << 16) | \ (L1_ITLB_2M_ASSOC << 8) | (L1_ITLB_2M_ENTRIES); *ebx = (L1_DTLB_4K_ASSOC << 24) | (L1_DTLB_4K_ENTRIES << 16) | \ @@ -2239,6 +2254,10 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, break; case 0x80000006: /* cache info (L2 cache) */ + if (cpu->cache_info_passthrough) { + host_cpuid(index, 0, eax, ebx, ecx, edx); + break; + } *eax = (AMD_ENC_ASSOC(L2_DTLB_2M_ASSOC) << 28) | \ (L2_DTLB_2M_ENTRIES << 16) | \ (AMD_ENC_ASSOC(L2_ITLB_2M_ASSOC) << 12) | \ -- cgit v1.2.1 From f010bc643a2759e87e989c3e4e85f15ec71ae98f Mon Sep 17 00:00:00 2001 From: Andrew Jones Date: Wed, 18 Sep 2013 16:41:45 +0200 Subject: target-i386: add feature kvm_pv_unhalt MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit I don't know yet if want this feature on by default, so for now I'm just adding support for "-cpu ...,+kvm_pv_unhalt". Signed-off-by: Andrew Jones Reviewed-by: Eduardo Habkost Reviewed-by: Andreas Färber Signed-off-by: Paolo Bonzini --- target-i386/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'target-i386') diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 46edd757f3..b6828022bc 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -235,7 +235,7 @@ static const char *ext4_feature_name[] = { static const char *kvm_feature_name[] = { "kvmclock", "kvm_nopiodelay", "kvm_mmu", "kvmclock", - "kvm_asyncpf", "kvm_steal_time", "kvm_pv_eoi", NULL, + "kvm_asyncpf", "kvm_steal_time", "kvm_pv_eoi", "kvm_pv_unhalt", NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, -- cgit v1.2.1