From ab1da85791340e504d10487e1add81b9988afa98 Mon Sep 17 00:00:00 2001 From: "Edgar E. Iglesias" Date: Tue, 17 Dec 2013 15:07:29 +1000 Subject: exec: Make stl_*_phys input an AddressSpace Reviewed-by: Peter Maydell Signed-off-by: Edgar E. Iglesias --- target-i386/seg_helper.c | 8 ++-- target-i386/smm_helper.c | 100 +++++++++++++++++++++++------------------------ target-i386/svm_helper.c | 28 +++++++------ 3 files changed, 72 insertions(+), 64 deletions(-) (limited to 'target-i386') diff --git a/target-i386/seg_helper.c b/target-i386/seg_helper.c index 6b18b3e41e..959212bfe3 100644 --- a/target-i386/seg_helper.c +++ b/target-i386/seg_helper.c @@ -1146,11 +1146,12 @@ static void handle_even_inj(CPUX86State *env, int intno, int is_int, event_inj = intno | type | SVM_EVTINJ_VALID; if (!rm && exception_has_error_code(intno)) { event_inj |= SVM_EVTINJ_VALID_ERR; - stl_phys(env->vm_vmcb + offsetof(struct vmcb, + stl_phys(cs->as, env->vm_vmcb + offsetof(struct vmcb, control.event_inj_err), error_code); } - stl_phys(env->vm_vmcb + offsetof(struct vmcb, control.event_inj), + stl_phys(cs->as, + env->vm_vmcb + offsetof(struct vmcb, control.event_inj), event_inj); } } @@ -1231,7 +1232,8 @@ static void do_interrupt_all(X86CPU *cpu, int intno, int is_int, offsetof(struct vmcb, control.event_inj)); - stl_phys(env->vm_vmcb + offsetof(struct vmcb, control.event_inj), + stl_phys(cs->as, + env->vm_vmcb + offsetof(struct vmcb, control.event_inj), event_inj & ~SVM_EVTINJ_VALID); } #endif diff --git a/target-i386/smm_helper.c b/target-i386/smm_helper.c index d62261cf4f..88f6d7f7c2 100644 --- a/target-i386/smm_helper.c +++ b/target-i386/smm_helper.c @@ -62,24 +62,24 @@ void do_smm_enter(X86CPU *cpu) offset = 0x7e00 + i * 16; stw_phys(sm_state + offset, dt->selector); stw_phys(sm_state + offset + 2, (dt->flags >> 8) & 0xf0ff); - stl_phys(sm_state + offset + 4, dt->limit); + stl_phys(cs->as, sm_state + offset + 4, dt->limit); stq_phys(cs->as, sm_state + offset + 8, dt->base); } stq_phys(cs->as, sm_state + 0x7e68, env->gdt.base); - stl_phys(sm_state + 0x7e64, env->gdt.limit); + stl_phys(cs->as, sm_state + 0x7e64, env->gdt.limit); stw_phys(sm_state + 0x7e70, env->ldt.selector); stq_phys(cs->as, sm_state + 0x7e78, env->ldt.base); - stl_phys(sm_state + 0x7e74, env->ldt.limit); + stl_phys(cs->as, sm_state + 0x7e74, env->ldt.limit); stw_phys(sm_state + 0x7e72, (env->ldt.flags >> 8) & 0xf0ff); stq_phys(cs->as, sm_state + 0x7e88, env->idt.base); - stl_phys(sm_state + 0x7e84, env->idt.limit); + stl_phys(cs->as, sm_state + 0x7e84, env->idt.limit); stw_phys(sm_state + 0x7e90, env->tr.selector); stq_phys(cs->as, sm_state + 0x7e98, env->tr.base); - stl_phys(sm_state + 0x7e94, env->tr.limit); + stl_phys(cs->as, sm_state + 0x7e94, env->tr.limit); stw_phys(sm_state + 0x7e92, (env->tr.flags >> 8) & 0xf0ff); stq_phys(cs->as, sm_state + 0x7ed0, env->efer); @@ -96,47 +96,47 @@ void do_smm_enter(X86CPU *cpu) stq_phys(cs->as, sm_state + 0x7ff8 - i * 8, env->regs[i]); } stq_phys(cs->as, sm_state + 0x7f78, env->eip); - stl_phys(sm_state + 0x7f70, cpu_compute_eflags(env)); - stl_phys(sm_state + 0x7f68, env->dr[6]); - stl_phys(sm_state + 0x7f60, env->dr[7]); + stl_phys(cs->as, sm_state + 0x7f70, cpu_compute_eflags(env)); + stl_phys(cs->as, sm_state + 0x7f68, env->dr[6]); + stl_phys(cs->as, sm_state + 0x7f60, env->dr[7]); - stl_phys(sm_state + 0x7f48, env->cr[4]); - stl_phys(sm_state + 0x7f50, env->cr[3]); - stl_phys(sm_state + 0x7f58, env->cr[0]); + stl_phys(cs->as, sm_state + 0x7f48, env->cr[4]); + stl_phys(cs->as, sm_state + 0x7f50, env->cr[3]); + stl_phys(cs->as, sm_state + 0x7f58, env->cr[0]); - stl_phys(sm_state + 0x7efc, SMM_REVISION_ID); - stl_phys(sm_state + 0x7f00, env->smbase); + stl_phys(cs->as, sm_state + 0x7efc, SMM_REVISION_ID); + stl_phys(cs->as, sm_state + 0x7f00, env->smbase); #else - stl_phys(sm_state + 0x7ffc, env->cr[0]); - stl_phys(sm_state + 0x7ff8, env->cr[3]); - stl_phys(sm_state + 0x7ff4, cpu_compute_eflags(env)); - stl_phys(sm_state + 0x7ff0, env->eip); - stl_phys(sm_state + 0x7fec, env->regs[R_EDI]); - stl_phys(sm_state + 0x7fe8, env->regs[R_ESI]); - stl_phys(sm_state + 0x7fe4, env->regs[R_EBP]); - stl_phys(sm_state + 0x7fe0, env->regs[R_ESP]); - stl_phys(sm_state + 0x7fdc, env->regs[R_EBX]); - stl_phys(sm_state + 0x7fd8, env->regs[R_EDX]); - stl_phys(sm_state + 0x7fd4, env->regs[R_ECX]); - stl_phys(sm_state + 0x7fd0, env->regs[R_EAX]); - stl_phys(sm_state + 0x7fcc, env->dr[6]); - stl_phys(sm_state + 0x7fc8, env->dr[7]); - - stl_phys(sm_state + 0x7fc4, env->tr.selector); - stl_phys(sm_state + 0x7f64, env->tr.base); - stl_phys(sm_state + 0x7f60, env->tr.limit); - stl_phys(sm_state + 0x7f5c, (env->tr.flags >> 8) & 0xf0ff); - - stl_phys(sm_state + 0x7fc0, env->ldt.selector); - stl_phys(sm_state + 0x7f80, env->ldt.base); - stl_phys(sm_state + 0x7f7c, env->ldt.limit); - stl_phys(sm_state + 0x7f78, (env->ldt.flags >> 8) & 0xf0ff); - - stl_phys(sm_state + 0x7f74, env->gdt.base); - stl_phys(sm_state + 0x7f70, env->gdt.limit); - - stl_phys(sm_state + 0x7f58, env->idt.base); - stl_phys(sm_state + 0x7f54, env->idt.limit); + stl_phys(cs->as, sm_state + 0x7ffc, env->cr[0]); + stl_phys(cs->as, sm_state + 0x7ff8, env->cr[3]); + stl_phys(cs->as, sm_state + 0x7ff4, cpu_compute_eflags(env)); + stl_phys(cs->as, sm_state + 0x7ff0, env->eip); + stl_phys(cs->as, sm_state + 0x7fec, env->regs[R_EDI]); + stl_phys(cs->as, sm_state + 0x7fe8, env->regs[R_ESI]); + stl_phys(cs->as, sm_state + 0x7fe4, env->regs[R_EBP]); + stl_phys(cs->as, sm_state + 0x7fe0, env->regs[R_ESP]); + stl_phys(cs->as, sm_state + 0x7fdc, env->regs[R_EBX]); + stl_phys(cs->as, sm_state + 0x7fd8, env->regs[R_EDX]); + stl_phys(cs->as, sm_state + 0x7fd4, env->regs[R_ECX]); + stl_phys(cs->as, sm_state + 0x7fd0, env->regs[R_EAX]); + stl_phys(cs->as, sm_state + 0x7fcc, env->dr[6]); + stl_phys(cs->as, sm_state + 0x7fc8, env->dr[7]); + + stl_phys(cs->as, sm_state + 0x7fc4, env->tr.selector); + stl_phys(cs->as, sm_state + 0x7f64, env->tr.base); + stl_phys(cs->as, sm_state + 0x7f60, env->tr.limit); + stl_phys(cs->as, sm_state + 0x7f5c, (env->tr.flags >> 8) & 0xf0ff); + + stl_phys(cs->as, sm_state + 0x7fc0, env->ldt.selector); + stl_phys(cs->as, sm_state + 0x7f80, env->ldt.base); + stl_phys(cs->as, sm_state + 0x7f7c, env->ldt.limit); + stl_phys(cs->as, sm_state + 0x7f78, (env->ldt.flags >> 8) & 0xf0ff); + + stl_phys(cs->as, sm_state + 0x7f74, env->gdt.base); + stl_phys(cs->as, sm_state + 0x7f70, env->gdt.limit); + + stl_phys(cs->as, sm_state + 0x7f58, env->idt.base); + stl_phys(cs->as, sm_state + 0x7f54, env->idt.limit); for (i = 0; i < 6; i++) { dt = &env->segs[i]; @@ -145,15 +145,15 @@ void do_smm_enter(X86CPU *cpu) } else { offset = 0x7f2c + (i - 3) * 12; } - stl_phys(sm_state + 0x7fa8 + i * 4, dt->selector); - stl_phys(sm_state + offset + 8, dt->base); - stl_phys(sm_state + offset + 4, dt->limit); - stl_phys(sm_state + offset, (dt->flags >> 8) & 0xf0ff); + stl_phys(cs->as, sm_state + 0x7fa8 + i * 4, dt->selector); + stl_phys(cs->as, sm_state + offset + 8, dt->base); + stl_phys(cs->as, sm_state + offset + 4, dt->limit); + stl_phys(cs->as, sm_state + offset, (dt->flags >> 8) & 0xf0ff); } - stl_phys(sm_state + 0x7f14, env->cr[4]); + stl_phys(cs->as, sm_state + 0x7f14, env->cr[4]); - stl_phys(sm_state + 0x7efc, SMM_REVISION_ID); - stl_phys(sm_state + 0x7ef8, env->smbase); + stl_phys(cs->as, sm_state + 0x7efc, SMM_REVISION_ID); + stl_phys(cs->as, sm_state + 0x7ef8, env->smbase); #endif /* init SMM cpu state */ diff --git a/target-i386/svm_helper.c b/target-i386/svm_helper.c index 6b371c8eeb..b9fd779b11 100644 --- a/target-i386/svm_helper.c +++ b/target-i386/svm_helper.c @@ -93,7 +93,7 @@ static inline void svm_save_seg(CPUX86State *env, hwaddr addr, sc->selector); stq_phys(cs->as, addr + offsetof(struct vmcb_seg, base), sc->base); - stl_phys(addr + offsetof(struct vmcb_seg, limit), + stl_phys(cs->as, addr + offsetof(struct vmcb_seg, limit), sc->limit); stw_phys(addr + offsetof(struct vmcb_seg, attrib), ((sc->flags >> 8) & 0xff) | ((sc->flags >> 12) & 0x0f00)); @@ -145,12 +145,12 @@ void helper_vmrun(CPUX86State *env, int aflag, int next_eip_addend) /* save the current CPU state in the hsave page */ stq_phys(cs->as, env->vm_hsave + offsetof(struct vmcb, save.gdtr.base), env->gdt.base); - stl_phys(env->vm_hsave + offsetof(struct vmcb, save.gdtr.limit), + stl_phys(cs->as, env->vm_hsave + offsetof(struct vmcb, save.gdtr.limit), env->gdt.limit); stq_phys(cs->as, env->vm_hsave + offsetof(struct vmcb, save.idtr.base), env->idt.base); - stl_phys(env->vm_hsave + offsetof(struct vmcb, save.idtr.limit), + stl_phys(cs->as, env->vm_hsave + offsetof(struct vmcb, save.idtr.limit), env->idt.limit); stq_phys(cs->as, @@ -599,11 +599,13 @@ void helper_vmexit(CPUX86State *env, uint32_t exit_code, uint64_t exit_info_1) env->eip); if (env->hflags & HF_INHIBIT_IRQ_MASK) { - stl_phys(env->vm_vmcb + offsetof(struct vmcb, control.int_state), + stl_phys(cs->as, + env->vm_vmcb + offsetof(struct vmcb, control.int_state), SVM_INTERRUPT_SHADOW_MASK); env->hflags &= ~HF_INHIBIT_IRQ_MASK; } else { - stl_phys(env->vm_vmcb + offsetof(struct vmcb, control.int_state), 0); + stl_phys(cs->as, + env->vm_vmcb + offsetof(struct vmcb, control.int_state), 0); } /* Save the VM state in the vmcb */ @@ -618,12 +620,12 @@ void helper_vmexit(CPUX86State *env, uint32_t exit_code, uint64_t exit_info_1) stq_phys(cs->as, env->vm_vmcb + offsetof(struct vmcb, save.gdtr.base), env->gdt.base); - stl_phys(env->vm_vmcb + offsetof(struct vmcb, save.gdtr.limit), + stl_phys(cs->as, env->vm_vmcb + offsetof(struct vmcb, save.gdtr.limit), env->gdt.limit); stq_phys(cs->as, env->vm_vmcb + offsetof(struct vmcb, save.idtr.base), env->idt.base); - stl_phys(env->vm_vmcb + offsetof(struct vmcb, save.idtr.limit), + stl_phys(cs->as, env->vm_vmcb + offsetof(struct vmcb, save.idtr.limit), env->idt.limit); stq_phys(cs->as, @@ -644,7 +646,8 @@ void helper_vmexit(CPUX86State *env, uint32_t exit_code, uint64_t exit_info_1) if (cs->interrupt_request & CPU_INTERRUPT_VIRQ) { int_ctl |= V_IRQ_MASK; } - stl_phys(env->vm_vmcb + offsetof(struct vmcb, control.int_ctl), int_ctl); + stl_phys(cs->as, + env->vm_vmcb + offsetof(struct vmcb, control.int_ctl), int_ctl); stq_phys(cs->as, env->vm_vmcb + offsetof(struct vmcb, save.rflags), cpu_compute_eflags(env)); @@ -728,13 +731,16 @@ void helper_vmexit(CPUX86State *env, uint32_t exit_code, uint64_t exit_info_1) stq_phys(cs->as, env->vm_vmcb + offsetof(struct vmcb, control.exit_info_1), exit_info_1); - stl_phys(env->vm_vmcb + offsetof(struct vmcb, control.exit_int_info), + stl_phys(cs->as, + env->vm_vmcb + offsetof(struct vmcb, control.exit_int_info), ldl_phys(cs->as, env->vm_vmcb + offsetof(struct vmcb, control.event_inj))); - stl_phys(env->vm_vmcb + offsetof(struct vmcb, control.exit_int_info_err), + stl_phys(cs->as, + env->vm_vmcb + offsetof(struct vmcb, control.exit_int_info_err), ldl_phys(cs->as, env->vm_vmcb + offsetof(struct vmcb, control.event_inj_err))); - stl_phys(env->vm_vmcb + offsetof(struct vmcb, control.event_inj), 0); + stl_phys(cs->as, + env->vm_vmcb + offsetof(struct vmcb, control.event_inj), 0); env->hflags2 &= ~HF2_GIF_MASK; /* FIXME: Resets the current ASID register to zero (host ASID). */ -- cgit v1.2.1