From ae67dc72e4f19238941894227d96b6201d71a70a Mon Sep 17 00:00:00 2001 From: Paolo Bonzini Date: Wed, 12 Nov 2014 12:04:56 +0100 Subject: target-i386: eliminate dead code and hoist common code out of "if" ist != 0 is checked in the first "if", so it cannot be true in the "else if" part. While at it, simplify the code and move the ESP alignment out of the conditionals. Reported by Coverity. Signed-off-by: Paolo Bonzini --- target-i386/seg_helper.c | 17 ++++------------- 1 file changed, 4 insertions(+), 13 deletions(-) (limited to 'target-i386') diff --git a/target-i386/seg_helper.c b/target-i386/seg_helper.c index af5c1c6830..c98eeb4351 100644 --- a/target-i386/seg_helper.c +++ b/target-i386/seg_helper.c @@ -883,32 +883,23 @@ static void do_interrupt64(CPUX86State *env, int intno, int is_int, } if ((!(e2 & DESC_C_MASK) && dpl < cpl) || ist != 0) { /* to inner privilege */ - if (ist != 0) { - esp = get_rsp_from_tss(env, ist + 3); - } else { - esp = get_rsp_from_tss(env, dpl); - } - esp &= ~0xfLL; /* align stack */ - ss = 0; new_stack = 1; + esp = get_rsp_from_tss(env, ist != 0 ? ist + 3 : dpl); + ss = 0; } else if ((e2 & DESC_C_MASK) || dpl == cpl) { /* to same privilege */ if (env->eflags & VM_MASK) { raise_exception_err(env, EXCP0D_GPF, selector & 0xfffc); } new_stack = 0; - if (ist != 0) { - esp = get_rsp_from_tss(env, ist + 3); - } else { - esp = env->regs[R_ESP]; - } - esp &= ~0xfLL; /* align stack */ + esp = env->regs[R_ESP]; dpl = cpl; } else { raise_exception_err(env, EXCP0D_GPF, selector & 0xfffc); new_stack = 0; /* avoid warning */ esp = 0; /* avoid warning */ } + esp &= ~0xfLL; /* align stack */ PUSHQ(esp, env->segs[R_SS].selector); PUSHQ(esp, env->regs[R_ESP]); -- cgit v1.2.1 From e6a33e45c270ea024929f4afb49283d610577af3 Mon Sep 17 00:00:00 2001 From: Paolo Bonzini Date: Wed, 12 Nov 2014 12:16:58 +0100 Subject: target-i386: fix Coverity complaints about overflows sipi_vector is an int; it is shifted by 12 and passed as a 64-bit value, which makes Coverity think that we wanted (uint64_t)sipi_vector << 12. But actually it must be between 0 and 255. Make this explicit. Signed-off-by: Paolo Bonzini --- target-i386/cpu.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'target-i386') diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 1b2c12ad94..015f5b5276 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -1104,7 +1104,7 @@ static inline void cpu_x86_load_seg_cache(CPUX86State *env, } static inline void cpu_x86_load_seg_cache_sipi(X86CPU *cpu, - int sipi_vector) + uint8_t sipi_vector) { CPUState *cs = CPU(cpu); CPUX86State *env = &cpu->env; -- cgit v1.2.1