From f0c3c505a8ec1a948006b3a16a35864a2270a84b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Andreas=20F=C3=A4rber?= <afaerber@suse.de>
Date: Mon, 26 Aug 2013 21:22:53 +0200
Subject: cpu: Move breakpoints field from CPU_COMMON to CPUState
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Most targets were using offsetof(CPUFooState, breakpoints) to determine
how much of CPUFooState to clear on reset. Use the next field after
CPU_COMMON instead, if any, or sizeof(CPUFooState) otherwise.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-i386/cpu.c       | 2 +-
 target-i386/cpu.h       | 3 ++-
 target-i386/helper.c    | 3 ++-
 target-i386/translate.c | 4 ++--
 4 files changed, 7 insertions(+), 5 deletions(-)

(limited to 'target-i386')

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 63ba2194cb..fab0f55735 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -2410,7 +2410,7 @@ static void x86_cpu_reset(CPUState *s)
     xcc->parent_reset(s);
 
 
-    memset(env, 0, offsetof(CPUX86State, breakpoints));
+    memset(env, 0, offsetof(CPUX86State, pat));
 
     tlb_flush(env, 1);
 
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 906018757d..4d1374c6cc 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -875,7 +875,7 @@ typedef struct CPUX86State {
     target_ulong exception_next_eip;
     target_ulong dr[8]; /* debug registers */
     union {
-        CPUBreakpoint *cpu_breakpoint[4];
+        struct CPUBreakpoint *cpu_breakpoint[4];
         struct CPUWatchpoint *cpu_watchpoint[4];
     }; /* break/watchpoints for dr[0..3] */
     uint32_t smbase;
@@ -887,6 +887,7 @@ typedef struct CPUX86State {
 
     CPU_COMMON
 
+    /* Fields from here on are preserved across CPU reset. */
     uint64_t pat;
 
     /* processor features (e.g. for CPUID insn) */
diff --git a/target-i386/helper.c b/target-i386/helper.c
index bd8da20946..59736d7a4f 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -1101,7 +1101,7 @@ void breakpoint_handler(CPUX86State *env)
             }
         }
     } else {
-        QTAILQ_FOREACH(bp, &env->breakpoints, entry)
+        QTAILQ_FOREACH(bp, &cs->breakpoints, entry) {
             if (bp->pc == env->eip) {
                 if (bp->flags & BP_CPU) {
                     check_hw_breakpoints(env, true);
@@ -1109,6 +1109,7 @@ void breakpoint_handler(CPUX86State *env)
                 }
                 break;
             }
+        }
     }
 }
 
diff --git a/target-i386/translate.c b/target-i386/translate.c
index 707ebd5ca0..02625e31c2 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -7965,8 +7965,8 @@ static inline void gen_intermediate_code_internal(X86CPU *cpu,
 
     gen_tb_start();
     for(;;) {
-        if (unlikely(!QTAILQ_EMPTY(&env->breakpoints))) {
-            QTAILQ_FOREACH(bp, &env->breakpoints, entry) {
+        if (unlikely(!QTAILQ_EMPTY(&cs->breakpoints))) {
+            QTAILQ_FOREACH(bp, &cs->breakpoints, entry) {
                 if (bp->pc == pc_ptr &&
                     !((bp->flags & BP_CPU) && (tb->flags & HF_RF_MASK))) {
                     gen_debug(dc, pc_ptr - dc->cs_base);
-- 
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