From 968a40f6fac887846d1316e737619233978a0cee Mon Sep 17 00:00:00 2001 From: "Edgar E. Iglesias" Date: Thu, 3 Sep 2009 12:59:46 +0200 Subject: microblaze: Trap on unaligned data accesses. Untested... Signed-off-by: Edgar E. Iglesias --- target-microblaze/translate.c | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-) (limited to 'target-microblaze/translate.c') diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c index 4fbe86a9a9..b863eb0a16 100644 --- a/target-microblaze/translate.c +++ b/target-microblaze/translate.c @@ -810,9 +810,16 @@ static void dec_load(DisasContext *dc) /* If we get a fault on a dslot, the jmpstate better be in sync. */ sync_jmpstate(dc); - if (dc->rd) + + /* Verify alignment if needed. */ + if ((dc->env->pvr.regs[2] & PVR2_UNALIGNED_EXC_MASK) && size > 1) { + gen_helper_memalign(*addr, tcg_const_tl(dc->rd), + tcg_const_tl(0), tcg_const_tl(size)); + } + + if (dc->rd) { gen_load(dc, cpu_R[dc->rd], *addr, size); - else { + } else { gen_load(dc, env_imm, *addr, size); } @@ -847,6 +854,13 @@ static void dec_store(DisasContext *dc) /* If we get a fault on a dslot, the jmpstate better be in sync. */ sync_jmpstate(dc); addr = compute_ldst_addr(dc, &t); + + /* Verify alignment if needed. */ + if ((dc->env->pvr.regs[2] & PVR2_UNALIGNED_EXC_MASK) && size > 1) { + gen_helper_memalign(*addr, tcg_const_tl(dc->rd), + tcg_const_tl(1), tcg_const_tl(size)); + } + gen_store(dc, *addr, cpu_R[dc->rd], size); if (addr == &t) tcg_temp_free(t); -- cgit v1.2.1