From 27103424c40ce71053c07d8a54ef431365fa9b7f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Mon, 26 Aug 2013 08:31:06 +0200 Subject: cpu: Move exception_index field from CPU_COMMON to CPUState MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Andreas Färber --- target-microblaze/helper.c | 16 +++++++--------- target-microblaze/op_helper.c | 4 +++- 2 files changed, 10 insertions(+), 10 deletions(-) (limited to 'target-microblaze') diff --git a/target-microblaze/helper.c b/target-microblaze/helper.c index d03f3690bb..48254154d3 100644 --- a/target-microblaze/helper.c +++ b/target-microblaze/helper.c @@ -31,7 +31,7 @@ void mb_cpu_do_interrupt(CPUState *cs) MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs); CPUMBState *env = &cpu->env; - env->exception_index = -1; + cs->exception_index = -1; env->res_addr = RES_ADDR_NONE; env->regs[14] = env->sregs[SR_PC]; } @@ -39,9 +39,7 @@ void mb_cpu_do_interrupt(CPUState *cs) int mb_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, int mmu_idx) { - MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs); - - cpu->env.exception_index = 0xaa; + cs->exception_index = 0xaa; cpu_dump_state(cs, stderr, fprintf, 0); return 1; } @@ -99,12 +97,12 @@ int mb_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, break; } - if (env->exception_index == EXCP_MMU) { + if (cs->exception_index == EXCP_MMU) { cpu_abort(env, "recursive faults\n"); } /* TLB miss. */ - env->exception_index = EXCP_MMU; + cs->exception_index = EXCP_MMU; } } else { /* MMU disabled or not available. */ @@ -127,7 +125,7 @@ void mb_cpu_do_interrupt(CPUState *cs) assert(!(env->iflags & (DRTI_FLAG | DRTE_FLAG | DRTB_FLAG))); /* assert(env->sregs[SR_MSR] & (MSR_EE)); Only for HW exceptions. */ env->res_addr = RES_ADDR_NONE; - switch (env->exception_index) { + switch (cs->exception_index) { case EXCP_HW_EXCP: if (!(env->pvr.regs[0] & PVR0_USE_EXC_MASK)) { qemu_log("Exception raised on system without exceptions!\n"); @@ -253,7 +251,7 @@ void mb_cpu_do_interrupt(CPUState *cs) env->sregs[SR_MSR] &= ~(MSR_VMS | MSR_UMS | MSR_VM | MSR_UM); env->sregs[SR_MSR] |= t; env->sregs[SR_MSR] |= MSR_BIP; - if (env->exception_index == EXCP_HW_BREAK) { + if (cs->exception_index == EXCP_HW_BREAK) { env->regs[16] = env->sregs[SR_PC]; env->sregs[SR_MSR] |= MSR_BIP; env->sregs[SR_PC] = cpu->base_vectors + 0x18; @@ -262,7 +260,7 @@ void mb_cpu_do_interrupt(CPUState *cs) break; default: cpu_abort(env, "unhandled exception type=%d\n", - env->exception_index); + cs->exception_index); break; } } diff --git a/target-microblaze/op_helper.c b/target-microblaze/op_helper.c index b70b2ea99c..318185a5df 100644 --- a/target-microblaze/op_helper.c +++ b/target-microblaze/op_helper.c @@ -95,7 +95,9 @@ uint32_t helper_get(uint32_t id, uint32_t ctrl) void helper_raise_exception(CPUMBState *env, uint32_t index) { - env->exception_index = index; + CPUState *cs = CPU(mb_env_get_cpu(env)); + + cs->exception_index = index; cpu_loop_exit(env); } -- cgit v1.2.1