From c570fd169c16f110781f31e0e963542a15229ee9 Mon Sep 17 00:00:00 2001 From: ths Date: Thu, 21 Dec 2006 01:19:56 +0000 Subject: Preliminiary MIPS64 support, disabled by default due to performance impact. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2250 c046a42c-6fe2-441c-8c8c-71466251a162 --- target-mips/mips-defs.h | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) (limited to 'target-mips/mips-defs.h') diff --git a/target-mips/mips-defs.h b/target-mips/mips-defs.h index 14d1438bc2..83480c6ab4 100644 --- a/target-mips/mips-defs.h +++ b/target-mips/mips-defs.h @@ -14,7 +14,8 @@ #if (MIPS_CPU == MIPS_R4Kc) /* 32 bits target */ -#define TARGET_LONG_BITS 32 +#undef MIPS_HAS_MIPS64 +//#define MIPS_HAS_MIPS64 1 /* real pages are variable size... */ #define TARGET_PAGE_BITS 12 /* Uses MIPS R4Kx enhancements to MIPS32 architecture */ @@ -69,7 +70,7 @@ (0 << CP0C3_MT) | (0 << CP0C3_SM) | (0 << CP0C3_TL)) #elif (MIPS_CPU == MIPS_R4Kp) /* 32 bits target */ -#define TARGET_LONG_BITS 32 +#undef MIPS_HAS_MIPS64 /* real pages are variable size... */ #define TARGET_PAGE_BITS 12 /* Uses MIPS R4Kx enhancements to MIPS32 architecture */ @@ -79,8 +80,14 @@ #else #error "MIPS CPU not defined" /* Reminder for other flags */ -//#define TARGET_MIPS64 +//#undef MIPS_HAS_MIPS64 //#define MIPS_USES_FPU #endif +#ifdef MIPS_HAS_MIPS64 +#define TARGET_LONG_BITS 64 +#else +#define TARGET_LONG_BITS 32 +#endif + #endif /* !defined (__QEMU_MIPS_DEFS_H__) */ -- cgit v1.2.1