From 38d8f5c84e7c02f2523005dddc31939ca18232dd Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Mon, 17 Dec 2012 19:47:15 +0100 Subject: exec: Return CPUState from qemu_get_cpu() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Move the declaration to qemu/cpu.h and add documentation. The implementation still depends on CPUArchState for CPU iteration. Signed-off-by: Andreas Färber --- target-mips/op_helper.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) (limited to 'target-mips') diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c index 1816a0ec8d..1bca4a159e 100644 --- a/target-mips/op_helper.c +++ b/target-mips/op_helper.c @@ -585,8 +585,9 @@ static inline void mips_tc_sleep(MIPSCPU *cpu, int tc) walking the list of CPUMIPSStates. */ static CPUMIPSState *mips_cpu_map_tc(CPUMIPSState *env, int *tc) { + MIPSCPU *cpu; CPUState *cs; - CPUMIPSState *other; + CPUState *other_cs; int vpe_idx; int tc_idx = *tc; @@ -599,8 +600,12 @@ static CPUMIPSState *mips_cpu_map_tc(CPUMIPSState *env, int *tc) cs = CPU(mips_env_get_cpu(env)); vpe_idx = tc_idx / cs->nr_threads; *tc = tc_idx % cs->nr_threads; - other = qemu_get_cpu(vpe_idx); - return other ? other : env; + other_cs = qemu_get_cpu(vpe_idx); + if (other_cs == NULL) { + return env; + } + cpu = MIPS_CPU(other_cs); + return &cpu->env; } /* The per VPE CP0_Status register shares some fields with the per TC -- cgit v1.2.1