From 4ecc31906d7535c4ad88fcc63968bef412dd67ba Mon Sep 17 00:00:00 2001
From: bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>
Date: Sun, 13 Mar 2005 17:01:22 +0000
Subject: fpu fixes (Jocelyn Mayer) - soft float support

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1335 c046a42c-6fe2-441c-8c8c-71466251a162
---
 target-ppc/cpu.h | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

(limited to 'target-ppc/cpu.h')

diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 1776a3577a..70ee83507a 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -27,6 +27,8 @@
 #include "config.h"
 #include <setjmp.h>
 
+#include "softfloat.h"
+
 /* Instruction types */
 enum {
     PPC_NONE     = 0x0000,
@@ -94,7 +96,7 @@ typedef struct CPUPPCState {
     /* general purpose registers */
     uint32_t gpr[32];
     /* floating point registers */
-    double fpr[32];
+    float64 fpr[32];
     /* segment registers */
     uint32_t sdr1;
     uint32_t sr[16];
@@ -119,9 +121,11 @@ typedef struct CPUPPCState {
     uint32_t spr[1024];
     /* qemu dedicated */
      /* temporary float registers */
-    double ft0;
-    double ft1;
-    double ft2;
+    float64 ft0;
+    float64 ft1;
+    float64 ft2;
+    float_status fp_status;
+
     int interrupt_request;
     jmp_buf jmp_env;
     int exception_index;
-- 
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