From 968e76bcab9a3c40f37c9a52822b6daa90ae7cd8 Mon Sep 17 00:00:00 2001 From: Tom Musta Date: Wed, 15 Jan 2014 08:10:38 -0600 Subject: target-ppc: VSX Stage 4: add xsrsqrtesp This patch adds the VSX Scalar Reciprocal Square Root Estimate Single Precision (xsrsqrtesp) instruction. The existing VSX_RSQRTE() macro is modified to support rounding of the intermediate double-precision result to single precision. Signed-off-by: Tom Musta Reviewed-by: Richard Henderson Signed-off-by: Alexander Graf --- target-ppc/fpu_helper.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) (limited to 'target-ppc/fpu_helper.c') diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c index fec9d1b15f..33da46270c 100644 --- a/target-ppc/fpu_helper.c +++ b/target-ppc/fpu_helper.c @@ -2018,7 +2018,7 @@ VSX_SQRT(xvsqrtsp, 4, float32, f32, 0, 0) * fld - vsr_t field (f32 or f64) * sfprf - set FPRF */ -#define VSX_RSQRTE(op, nels, tp, fld, sfprf) \ +#define VSX_RSQRTE(op, nels, tp, fld, sfprf, r2sp) \ void helper_##op(CPUPPCState *env, uint32_t opcode) \ { \ ppc_vsr_t xt, xb; \ @@ -2043,6 +2043,10 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \ } \ } \ \ + if (r2sp) { \ + xt.fld[i] = helper_frsp(env, xt.fld[i]); \ + } \ + \ if (sfprf) { \ helper_compute_fprf(env, xt.fld[i], sfprf); \ } \ @@ -2052,9 +2056,10 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \ helper_float_check_status(env); \ } -VSX_RSQRTE(xsrsqrtedp, 1, float64, f64, 1) -VSX_RSQRTE(xvrsqrtedp, 2, float64, f64, 0) -VSX_RSQRTE(xvrsqrtesp, 4, float32, f32, 0) +VSX_RSQRTE(xsrsqrtedp, 1, float64, f64, 1, 0) +VSX_RSQRTE(xsrsqrtesp, 1, float64, f64, 1, 1) +VSX_RSQRTE(xvrsqrtedp, 2, float64, f64, 0, 0) +VSX_RSQRTE(xvrsqrtesp, 4, float32, f32, 0, 0) static inline int ppc_float32_get_unbiased_exp(float32 f) { -- cgit v1.2.1