From 57fca134bb64926f00ab8b14cdb8d345f395e07f Mon Sep 17 00:00:00 2001 From: Tom Musta Date: Mon, 25 Aug 2014 14:25:41 -0500 Subject: target-ppc: Optimize rlwnm MB=0 ME=31 Optimize the special case of rlwnm where MB=0 and ME=31. This can be implemented using a ROTL. Suggested-by: Richard Henderson Signed-off-by: Tom Musta Reviewed-by: Richard Henderson Signed-off-by: Alexander Graf --- target-ppc/translate.c | 56 ++++++++++++++++++++++++++++++-------------------- 1 file changed, 34 insertions(+), 22 deletions(-) (limited to 'target-ppc/translate.c') diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 889e37d272..57cb381447 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -1721,37 +1721,49 @@ static void gen_rlwinm(DisasContext *ctx) static void gen_rlwnm(DisasContext *ctx) { uint32_t mb, me; - TCGv t0; -#if defined(TARGET_PPC64) - TCGv t1; -#endif - mb = MB(ctx->opcode); me = ME(ctx->opcode); - t0 = tcg_temp_new(); - tcg_gen_andi_tl(t0, cpu_gpr[rB(ctx->opcode)], 0x1f); + + if (likely(mb == 0 && me == 31)) { + TCGv_i32 t0, t1; + t0 = tcg_temp_new_i32(); + t1 = tcg_temp_new_i32(); + tcg_gen_trunc_tl_i32(t0, cpu_gpr[rB(ctx->opcode)]); + tcg_gen_trunc_tl_i32(t1, cpu_gpr[rS(ctx->opcode)]); + tcg_gen_andi_i32(t0, t0, 0x1f); + tcg_gen_rotl_i32(t1, t1, t0); + tcg_gen_extu_i32_tl(cpu_gpr[rA(ctx->opcode)], t1); + tcg_temp_free_i32(t0); + tcg_temp_free_i32(t1); + } else { + TCGv t0; #if defined(TARGET_PPC64) - t1 = tcg_temp_new_i64(); - tcg_gen_deposit_i64(t1, cpu_gpr[rS(ctx->opcode)], - cpu_gpr[rS(ctx->opcode)], 32, 32); - tcg_gen_rotl_i64(t0, t1, t0); - tcg_temp_free_i64(t1); -#else - tcg_gen_rotl_i32(t0, cpu_gpr[rS(ctx->opcode)], t0); + TCGv t1; #endif - if (unlikely(mb != 0 || me != 31)) { + + t0 = tcg_temp_new(); + tcg_gen_andi_tl(t0, cpu_gpr[rB(ctx->opcode)], 0x1f); #if defined(TARGET_PPC64) - mb += 32; - me += 32; + t1 = tcg_temp_new_i64(); + tcg_gen_deposit_i64(t1, cpu_gpr[rS(ctx->opcode)], + cpu_gpr[rS(ctx->opcode)], 32, 32); + tcg_gen_rotl_i64(t0, t1, t0); + tcg_temp_free_i64(t1); +#else + tcg_gen_rotl_i32(t0, cpu_gpr[rS(ctx->opcode)], t0); #endif - tcg_gen_andi_tl(cpu_gpr[rA(ctx->opcode)], t0, MASK(mb, me)); - } else { + if (unlikely(mb != 0 || me != 31)) { #if defined(TARGET_PPC64) - tcg_gen_andi_tl(t0, t0, MASK(32, 63)); + mb += 32; + me += 32; #endif - tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], t0); + tcg_gen_andi_tl(cpu_gpr[rA(ctx->opcode)], t0, MASK(mb, me)); + } else { + tcg_gen_andi_tl(t0, t0, MASK(32, 63)); + tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], t0); + } + tcg_temp_free(t0); } - tcg_temp_free(t0); if (unlikely(Rc(ctx->opcode) != 0)) gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); } -- cgit v1.2.1