From a0e372f0c49ac01faeaeb73a6e8f50e8ac615f34 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Fri, 28 Jun 2013 23:18:47 +0200 Subject: cpu: Introduce CPUState::gdb_num_regs and CPUClass::gdb_num_core_regs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit CPUState::gdb_num_regs replaces num_g_regs. CPUClass::gdb_num_core_regs replaces NUM_CORE_REGS. Allows building gdb_register_coprocessor() for xtensa, too. As a side effect this should fix coprocessor register numbering for SMP. Acked-by: Michael Walle (for lm32) Acked-by: Max Filippov (for xtensa) Signed-off-by: Andreas Färber --- target-ppc/translate_init.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'target-ppc/translate_init.c') diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 0b0844f467..91161939c0 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -8461,6 +8461,8 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data) #ifndef CONFIG_USER_ONLY cc->get_phys_page_debug = ppc_cpu_get_phys_page_debug; #endif + + cc->gdb_num_core_regs = 71; } static const TypeInfo ppc_cpu_type_info = { -- cgit v1.2.1