From cd9adfdd7755f053aea1ffc8e1df7b9b022174ff Mon Sep 17 00:00:00 2001 From: Alexey Kardashevskiy Date: Wed, 4 Jun 2014 22:51:03 +1000 Subject: target-ppc: Enable DABRX SPR and limit it to <=POWER7 This adds DABRX SPR. As DABR(X) are present in POWER CPUs till POWER7 only and POWER8 does not have them (as it implements more powerful facility instead), this limits DABR/DABRX registration by POWER7 (inclusive). Signed-off-by: Alexey Kardashevskiy Signed-off-by: Alexander Graf --- target-ppc/translate_init.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) (limited to 'target-ppc/translate_init.c') diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 04390a567c..85581c9537 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -7411,10 +7411,21 @@ static void gen_spr_book3s_altivec(CPUPPCState *env) static void gen_spr_book3s_dbg(CPUPPCState *env) { + /* + * TODO: different specs define different scopes for these, + * will have to address this: + * 970: super/write and super/read + * powerisa 2.03..2.04: hypv/write and super/read. + * powerisa 2.05 and newer: hypv/write and hypv/read. + */ spr_register_kvm(env, SPR_DABR, "DABR", SPR_NOACCESS, SPR_NOACCESS, &spr_read_generic, &spr_write_generic, KVM_REG_PPC_DABR, 0x00000000); + spr_register_kvm(env, SPR_DABRX, "DABRX", + SPR_NOACCESS, SPR_NOACCESS, + &spr_read_generic, &spr_write_generic, + KVM_REG_PPC_DABRX, 0x00000000); } static void gen_spr_970_dbg(CPUPPCState *env) @@ -7793,7 +7804,6 @@ static void init_proc_book3s_64(CPUPPCState *env, int version) gen_spr_book3s_altivec(env); gen_spr_book3s_pmu_sup(env); gen_spr_book3s_pmu_user(env); - gen_spr_book3s_dbg(env); gen_spr_book3s_common(env); switch (version) { @@ -7837,6 +7847,9 @@ static void init_proc_book3s_64(CPUPPCState *env, int version) gen_spr_power8_pmu_user(env); gen_spr_power8_tm(env); } + if (version < BOOK3S_CPU_POWER8) { + gen_spr_book3s_dbg(env); + } #if !defined(CONFIG_USER_ONLY) switch (version) { case BOOK3S_CPU_970: -- cgit v1.2.1