From 50f5fc0cf24fbc12434a5ad6e3784341f92e23bd Mon Sep 17 00:00:00 2001 From: Tom Musta Date: Wed, 12 Feb 2014 15:22:56 -0600 Subject: target-ppc: Altivec 2.07: Add Opcode Macro for VX Form Instructions This patch adds a macro to insert an entry into the opcode table for Altivec Power ISA Version 2.07 instructions. The macro is similar to the GEN_VXFORM macro except that it tags the entry with the PPC2_ALTIVEC_207 flag rather than PPC_ALTIVEC. Signed-off-by: Tom Musta Signed-off-by: Alexander Graf --- target-ppc/translate.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'target-ppc') diff --git a/target-ppc/translate.c b/target-ppc/translate.c index ffcee7ff96..a55789f396 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -10280,6 +10280,11 @@ GEN_VX_LOGICAL(vnor, tcg_gen_nor_i64, 2, 20), #undef GEN_VXFORM #define GEN_VXFORM(name, opc2, opc3) \ GEN_HANDLER(name, 0x04, opc2, opc3, 0x00000000, PPC_ALTIVEC) + +#undef GEN_VXFORM_207 +#define GEN_VXFORM_207(name, opc2, opc3) \ +GEN_HANDLER_E(name, 0x04, opc2, opc3, 0x00000000, PPC_NONE, PPC2_ALTIVEC_207) + #undef GEN_VXFORM_DUAL #define GEN_VXFORM_DUAL(name0, name1, opc2, opc3, type0, type1) \ GEN_HANDLER_E(name0##_##name1, 0x4, opc2, opc3, 0x00000000, type0, type1) -- cgit v1.2.1