From 94840e0700a3cbd0b0d99ae9ddecf47b4bbcc5d7 Mon Sep 17 00:00:00 2001 From: Tom Musta Date: Mon, 10 Feb 2014 11:26:53 -0600 Subject: target-ppc: Add Flag for bctar This patch adds a flag for the bctar instruction. This instruction is being introduced via Power ISA 2.07. Also, the flag is added to the Power8 machine model since the P8 processor supports this instruction. Signed-off-by: Tom Musta Signed-off-by: Alexander Graf --- target-ppc/cpu.h | 6 ++++-- target-ppc/translate_init.c | 2 +- 2 files changed, 5 insertions(+), 3 deletions(-) (limited to 'target-ppc') diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index bb299d70a1..9a40d209bb 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1887,12 +1887,14 @@ enum { PPC2_FP_CVT_ISA206 = 0x0000000000000400ULL, /* ISA 2.06B floating point test instructions */ PPC2_FP_TST_ISA206 = 0x0000000000000800ULL, - + /* ISA 2.07 bctar instruction */ + PPC2_BCTAR_ISA207 = 0x0000000000001000ULL, #define PPC_TCG_INSNS2 (PPC2_BOOKE206 | PPC2_VSX | PPC2_PRCNTL | PPC2_DBRX | \ PPC2_ISA205 | PPC2_VSX207 | PPC2_PERM_ISA206 | \ PPC2_DIVE_ISA206 | PPC2_ATOMIC_ISA206 | \ - PPC2_FP_CVT_ISA206 | PPC2_FP_TST_ISA206) + PPC2_FP_CVT_ISA206 | PPC2_FP_TST_ISA206 | \ + PPC2_BCTAR_ISA207) }; /*****************************************************************************/ diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 52a4f4f42a..b4328f6617 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -7159,7 +7159,7 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data) pcc->insns_flags2 = PPC2_VSX | PPC2_VSX207 | PPC2_DFP | PPC2_DBRX | PPC2_PERM_ISA206 | PPC2_DIVE_ISA206 | PPC2_ATOMIC_ISA206 | PPC2_FP_CVT_ISA206 | - PPC2_FP_TST_ISA206; + PPC2_FP_TST_ISA206 | PPC2_BCTAR_ISA207; pcc->msr_mask = 0x800000000284FF36ULL; pcc->mmu_model = POWERPC_MMU_2_06; #if defined(CONFIG_SOFTMMU) -- cgit v1.2.1