From e343da72b6b99495174f1eeb4af74e70c3147a86 Mon Sep 17 00:00:00 2001 From: aurel32 Date: Sun, 4 Jan 2009 22:09:31 +0000 Subject: Add v{add,sub}cuw instructions. Signed-off-by: Nathan Froyd Signed-off-by: Aurelien Jarno git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6168 c046a42c-6fe2-441c-8c8c-71466251a162 --- target-ppc/helper.h | 2 ++ target-ppc/op_helper.c | 16 ++++++++++++++++ target-ppc/translate.c | 2 ++ 3 files changed, 20 insertions(+) (limited to 'target-ppc') diff --git a/target-ppc/helper.h b/target-ppc/helper.h index a87b517963..21a505f149 100644 --- a/target-ppc/helper.h +++ b/target-ppc/helper.h @@ -148,6 +148,8 @@ DEF_HELPER_3(vslh, void, avr, avr, avr) DEF_HELPER_3(vslw, void, avr, avr, avr) DEF_HELPER_3(vslo, void, avr, avr, avr) DEF_HELPER_3(vsro, void, avr, avr, avr) +DEF_HELPER_3(vaddcuw, void, avr, avr, avr) +DEF_HELPER_3(vsubcuw, void, avr, avr, avr) DEF_HELPER_1(efscfsi, i32, i32) DEF_HELPER_1(efscfui, i32, i32) diff --git a/target-ppc/op_helper.c b/target-ppc/op_helper.c index 3eee553177..81df85b3b7 100644 --- a/target-ppc/op_helper.c +++ b/target-ppc/op_helper.c @@ -1972,6 +1972,14 @@ target_ulong helper_dlmzb (target_ulong high, target_ulong low, uint32_t update_ for (index = ARRAY_SIZE(r->element)-1; index >= 0; index--) #endif +void helper_vaddcuw (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) +{ + int i; + for (i = 0; i < ARRAY_SIZE(r->u32); i++) { + r->u32[i] = ~a->u32[i] < b->u32[i]; + } +} + #define VARITH_DO(name, op, element) \ void helper_v##name (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ { \ @@ -2148,6 +2156,14 @@ void helper_vsro (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) #endif } +void helper_vsubcuw (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) +{ + int i; + for (i = 0; i < ARRAY_SIZE(r->u32); i++) { + r->u32[i] = a->u32[i] >= b->u32[i]; + } +} + #undef VECTOR_FOR_INORDER_I #undef HI_IDX #undef LO_IDX diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 3f142e5d38..28ef5afe9b 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -6230,6 +6230,8 @@ GEN_VXFORM(vsrah, 2, 13); GEN_VXFORM(vsraw, 2, 14); GEN_VXFORM(vslo, 6, 16); GEN_VXFORM(vsro, 6, 17); +GEN_VXFORM(vaddcuw, 0, 6); +GEN_VXFORM(vsubcuw, 0, 22); /*** SPE extension ***/ /* Register moves */ -- cgit v1.2.1