From d267571be419d389184916b56f862a8f143e67c5 Mon Sep 17 00:00:00 2001 From: Thomas Huth Date: Thu, 12 Feb 2015 18:09:24 +0100 Subject: s390x/mmu: Fix exception types when checking the ASCEs If an ASCE has illegal bits set, an ASCE-type exception should be generated instead of a translation specification exception. Signed-off-by: Thomas Huth Signed-off-by: Jens Freimann Reviewed-by: David Hildenbrand Reviewed-by: Cornelia Huck Signed-off-by: Christian Borntraeger --- target-s390x/mmu_helper.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'target-s390x') diff --git a/target-s390x/mmu_helper.c b/target-s390x/mmu_helper.c index 109a2d3c85..f9eaf074d1 100644 --- a/target-s390x/mmu_helper.c +++ b/target-s390x/mmu_helper.c @@ -252,7 +252,7 @@ static int mmu_translate_asc(CPUS390XState *env, target_ulong vaddr, if (vaddr & 0xffe0000000000000ULL) { DPRINTF("%s: vaddr doesn't fit 0x%16" PRIx64 " 0xffe0000000000000ULL\n", __func__, vaddr); - trigger_page_fault(env, vaddr, PGM_TRANS_SPEC, asc, rw, exc); + trigger_page_fault(env, vaddr, PGM_ASCE_TYPE, asc, rw, exc); return -1; } if ((vaddr >> 51 & 3) > (asce & _ASCE_TABLE_LENGTH)) { @@ -264,7 +264,7 @@ static int mmu_translate_asc(CPUS390XState *env, target_ulong vaddr, if (vaddr & 0xfffffc0000000000ULL) { DPRINTF("%s: vaddr doesn't fit 0x%16" PRIx64 " 0xfffffc0000000000ULL\n", __func__, vaddr); - trigger_page_fault(env, vaddr, PGM_TRANS_SPEC, asc, rw, exc); + trigger_page_fault(env, vaddr, PGM_ASCE_TYPE, asc, rw, exc); return -1; } if ((vaddr >> 40 & 3) > (asce & _ASCE_TABLE_LENGTH)) { @@ -276,7 +276,7 @@ static int mmu_translate_asc(CPUS390XState *env, target_ulong vaddr, if (vaddr & 0xffffffff80000000ULL) { DPRINTF("%s: vaddr doesn't fit 0x%16" PRIx64 " 0xffffffff80000000ULL\n", __func__, vaddr); - trigger_page_fault(env, vaddr, PGM_TRANS_SPEC, asc, rw, exc); + trigger_page_fault(env, vaddr, PGM_ASCE_TYPE, asc, rw, exc); return -1; } if ((vaddr >> 29 & 3) > (asce & _ASCE_TABLE_LENGTH)) { -- cgit v1.2.1