From 361dea401f529fc136aaeb49c82b2a5bb7faa316 Mon Sep 17 00:00:00 2001 From: Blue Swirl Date: Sat, 10 Mar 2012 20:37:00 +0000 Subject: sparc64: implement PCI and ISA irqs Generate correct trap for external interrupts. Map PCI and ISA IRQs to RIC/UltraSPARC-IIi interrupt vectors. Signed-off-by: Blue Swirl --- target-sparc/cpu.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'target-sparc/cpu.h') diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h index 887adc3631..f638457a89 100644 --- a/target-sparc/cpu.h +++ b/target-sparc/cpu.h @@ -493,6 +493,9 @@ struct CPUSPARCState { /* UA 2005 hyperprivileged registers */ uint64_t hpstate, htstate[MAXTL_MAX], hintp, htba, hver, hstick_cmpr, ssr; CPUTimer *hstick; // UA 2005 + /* Interrupt vector registers */ + uint64_t ivec_status; + uint64_t ivec_data[3]; uint32_t softint; #define SOFTINT_TIMER 1 #define SOFTINT_STIMER (1 << 16) -- cgit v1.2.1