From 4d2c2b77f3d0c59642dd2ce799a0fb4c2a91aca8 Mon Sep 17 00:00:00 2001 From: Blue Swirl Date: Sat, 18 Jun 2011 20:27:05 +0000 Subject: Sparc32: dummy implementation of MXCC MMU breakpoint registers Add dummy registers for SuperSPARC MXCC MMU counter breakpoints, save and load all MXCC registers. Signed-off-by: Blue Swirl --- target-sparc/machine.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) (limited to 'target-sparc/machine.c') diff --git a/target-sparc/machine.c b/target-sparc/machine.c index 752e431778..bae23c54ee 100644 --- a/target-sparc/machine.c +++ b/target-sparc/machine.c @@ -45,6 +45,19 @@ void cpu_save(QEMUFile *f, void *opaque) /* MMU */ for (i = 0; i < 32; i++) qemu_put_be32s(f, &env->mmuregs[i]); + for (i = 0; i < 4; i++) { + qemu_put_be64s(f, &env->mxccdata[i]); + } + for (i = 0; i < 8; i++) { + qemu_put_be64s(f, &env->mxccregs[i]); + } + qemu_put_be32s(f, &env->mmubpctrv); + qemu_put_be32s(f, &env->mmubpctrc); + qemu_put_be32s(f, &env->mmubpctrs); + qemu_put_be64s(f, &env->mmubpaction); + for (i = 0; i < 4; i++) { + qemu_put_be64s(f, &env->mmubpregs[i]); + } #else qemu_put_be64s(f, &env->lsu); for (i = 0; i < 16; i++) { @@ -141,6 +154,19 @@ int cpu_load(QEMUFile *f, void *opaque, int version_id) /* MMU */ for (i = 0; i < 32; i++) qemu_get_be32s(f, &env->mmuregs[i]); + for (i = 0; i < 4; i++) { + qemu_get_be64s(f, &env->mxccdata[i]); + } + for (i = 0; i < 8; i++) { + qemu_get_be64s(f, &env->mxccregs[i]); + } + qemu_get_be32s(f, &env->mmubpctrv); + qemu_get_be32s(f, &env->mmubpctrc); + qemu_get_be32s(f, &env->mmubpctrs); + qemu_get_be64s(f, &env->mmubpaction); + for (i = 0; i < 4; i++) { + qemu_get_be64s(f, &env->mmubpregs[i]); + } #else qemu_get_be64s(f, &env->lsu); for (i = 0; i < 16; i++) { -- cgit v1.2.1