From 5dc1fbae707513f9664aa88940a2cd52b064cda2 Mon Sep 17 00:00:00 2001 From: Bastian Koppelmann Date: Tue, 16 Feb 2016 22:27:32 +0100 Subject: target-tricore: Fix wrong precedences on psw_write Wrong braces on the restore of the cached TCGv SV and V bit could lead to a wrong PSW. While at this it removes unnecessary braces for the restore of the cached TCGv AV and SAV bits. Signed-off-by: Bastian Koppelmann --- target-tricore/helper.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'target-tricore') diff --git a/target-tricore/helper.c b/target-tricore/helper.c index a8fd418b42..7d96daddb1 100644 --- a/target-tricore/helper.c +++ b/target-tricore/helper.c @@ -127,9 +127,9 @@ uint32_t psw_read(CPUTriCoreState *env) void psw_write(CPUTriCoreState *env, uint32_t val) { env->PSW_USB_C = (val & MASK_USB_C); - env->PSW_USB_V = (val & MASK_USB_V << 1); - env->PSW_USB_SV = (val & MASK_USB_SV << 2); - env->PSW_USB_AV = ((val & MASK_USB_AV) << 3); - env->PSW_USB_SAV = ((val & MASK_USB_SAV) << 4); + env->PSW_USB_V = (val & MASK_USB_V) << 1; + env->PSW_USB_SV = (val & MASK_USB_SV) << 2; + env->PSW_USB_AV = (val & MASK_USB_AV) << 3; + env->PSW_USB_SAV = (val & MASK_USB_SAV) << 4; env->PSW = val; } -- cgit v1.2.1