From 553e44f90645b7f2fc9cec7583844e24cd86019f Mon Sep 17 00:00:00 2001 From: Max Filippov Date: Tue, 6 Sep 2011 03:55:43 +0400 Subject: target-xtensa: implement windowed registers See ISA, 4.7.1 for details. Physical registers and currently visible window are separate fields in CPUEnv. Only current window is accessible to TCG. On operations that change window base helpers copy current window to and from physical registers. Window overflow check described in 4.7.1.3 is in separate patch. Signed-off-by: Max Filippov Signed-off-by: Blue Swirl --- target-xtensa/cpu.h | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'target-xtensa/cpu.h') diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h index cae663706b..7e662f5402 100644 --- a/target-xtensa/cpu.h +++ b/target-xtensa/cpu.h @@ -108,6 +108,8 @@ enum { enum { SAR = 3, SCOMPARE1 = 12, + WINDOW_BASE = 72, + WINDOW_START = 73, EPC1 = 177, DEPC = 192, EXCSAVE1 = 209, @@ -134,6 +136,8 @@ enum { #define PS_WOE 0x40000 +#define MAX_NAREG 64 + enum { /* Static vectors */ EXC_RESET, @@ -185,6 +189,7 @@ enum { typedef struct XtensaConfig { const char *name; uint64_t options; + unsigned nareg; int excm_level; int ndepc; uint32_t exception_vector[EXC_MAX]; @@ -196,6 +201,7 @@ typedef struct CPUXtensaState { uint32_t pc; uint32_t sregs[256]; uint32_t uregs[256]; + uint32_t phys_regs[MAX_NAREG]; int exception_taken; @@ -214,6 +220,8 @@ int cpu_xtensa_exec(CPUXtensaState *s); void do_interrupt(CPUXtensaState *s); int cpu_xtensa_signal_handler(int host_signum, void *pinfo, void *puc); void xtensa_cpu_list(FILE *f, fprintf_function cpu_fprintf); +void xtensa_sync_window_from_phys(CPUState *env); +void xtensa_sync_phys_from_window(CPUState *env); #define XTENSA_OPTION_BIT(opt) (((uint64_t)1) << (opt)) -- cgit v1.2.1