From a8766e3172c1671cab297c1ef4566a3c5d094822 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Fri, 4 May 2018 18:05:51 +0100 Subject: target/arm: Tidy condition in disas_simd_two_reg_misc MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Path analysis shows that size == 3 && !is_q has been eliminated. Fixes: Coverity CID1385853 Signed-off-by: Richard Henderson Reviewed-by: Alex Bennée Message-id: 20180501180455.11214-3-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/translate-a64.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'target/arm/translate-a64.c') diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 97950dce1a..6d49f30b4a 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -11473,7 +11473,11 @@ static void disas_simd_two_reg_misc(DisasContext *s, uint32_t insn) /* All 64-bit element operations can be shared with scalar 2misc */ int pass; - for (pass = 0; pass < (is_q ? 2 : 1); pass++) { + /* Coverity claims (size == 3 && !is_q) has been eliminated + * from all paths leading to here. + */ + tcg_debug_assert(is_q); + for (pass = 0; pass < 2; pass++) { TCGv_i64 tcg_op = tcg_temp_new_i64(); TCGv_i64 tcg_res = tcg_temp_new_i64(); -- cgit v1.2.1