From 13189a9080b35b13af23f2be4806fa0cdbb31af3 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Llu=C3=ADs=20Vilanova?= <vilanova@ac.upc.edu>
Date: Fri, 14 Jul 2017 12:34:18 +0300
Subject: target/arm: [tcg] Port to translate_insn
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Incrementally paves the way towards using the generic instruction translation
loop.

Reviewed-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu>
Message-Id: <150002485863.22386.13949856269576226529.stgit@frigg.lan>
[rth: Adjust for translate_insn interface change.]
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 target/arm/translate.h | 1 +
 1 file changed, 1 insertion(+)

(limited to 'target/arm/translate.h')

diff --git a/target/arm/translate.h b/target/arm/translate.h
index a804ff65ac..e8dcec51ac 100644
--- a/target/arm/translate.h
+++ b/target/arm/translate.h
@@ -9,6 +9,7 @@ typedef struct DisasContext {
     DisasContextBase base;
 
     target_ulong pc;
+    target_ulong next_page_start;
     uint32_t insn;
     /* Nonzero if this instruction has been conditionally skipped.  */
     int condjmp;
-- 
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