From a380f9db96dc94e5109611e4fd0fb4f671e30143 Mon Sep 17 00:00:00 2001 From: Aurelien Jarno Date: Mon, 1 May 2017 23:20:43 +0200 Subject: target/sh4: optimize gen_write_sr using extract op MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This doesn't change the generated code on x86, but optimizes it on most RISC architectures and makes the code simpler to read. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Signed-off-by: Aurelien Jarno --- target/sh4/translate.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) (limited to 'target/sh4/translate.c') diff --git a/target/sh4/translate.c b/target/sh4/translate.c index fe8bff54a6..7a504a7f5a 100644 --- a/target/sh4/translate.c +++ b/target/sh4/translate.c @@ -204,12 +204,9 @@ static void gen_write_sr(TCGv src) { tcg_gen_andi_i32(cpu_sr, src, ~((1u << SR_Q) | (1u << SR_M) | (1u << SR_T))); - tcg_gen_shri_i32(cpu_sr_q, src, SR_Q); - tcg_gen_andi_i32(cpu_sr_q, cpu_sr_q, 1); - tcg_gen_shri_i32(cpu_sr_m, src, SR_M); - tcg_gen_andi_i32(cpu_sr_m, cpu_sr_m, 1); - tcg_gen_shri_i32(cpu_sr_t, src, SR_T); - tcg_gen_andi_i32(cpu_sr_t, cpu_sr_t, 1); + tcg_gen_extract_i32(cpu_sr_q, src, SR_Q, 1); + tcg_gen_extract_i32(cpu_sr_m, src, SR_M, 1); + tcg_gen_extract_i32(cpu_sr_t, src, SR_T, 1); } static inline void gen_save_cpu_state(DisasContext *ctx, bool save_pc) -- cgit v1.2.1