From 1c2adb958fc07e5b3e81ed21b801c04a15f41f4f Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Tue, 10 Oct 2017 14:34:37 -0700 Subject: tcg: Initialize cpu_env generically MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is identical for each target. So, move the initialization to common code. Move the variable itself out of tcg_ctx and name it cpu_env to minimize changes within targets. This also means we can remove tcg_global_reg_new_{ptr,i32,i64}, since there are no longer global-register temps created by targets. Reviewed-by: Emilio G. Cota Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- tcg/tcg-op.c | 30 +++++++++++++++--------------- tcg/tcg.c | 32 ++++++++------------------------ tcg/tcg.h | 9 +-------- 3 files changed, 24 insertions(+), 47 deletions(-) (limited to 'tcg') diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index ba603281d3..3cad30b1f2 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -2562,7 +2562,7 @@ void tcg_gen_lookup_and_goto_ptr(void) { if (TCG_TARGET_HAS_goto_ptr && !qemu_loglevel_mask(CPU_LOG_TB_NOCHAIN)) { TCGv_ptr ptr = tcg_temp_new_ptr(); - gen_helper_lookup_tb_ptr(ptr, tcg_ctx->tcg_env); + gen_helper_lookup_tb_ptr(ptr, cpu_env); tcg_gen_op1i(INDEX_op_goto_ptr, tcgv_ptr_arg(ptr)); tcg_temp_free_ptr(ptr); } else { @@ -2648,7 +2648,7 @@ void tcg_gen_qemu_ld_i32(TCGv_i32 val, TCGv addr, TCGArg idx, TCGMemOp memop) { tcg_gen_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD); memop = tcg_canonicalize_memop(memop, 0, 0); - trace_guest_mem_before_tcg(tcg_ctx->cpu, tcg_ctx->tcg_env, + trace_guest_mem_before_tcg(tcg_ctx->cpu, cpu_env, addr, trace_mem_get_info(memop, 0)); gen_ldst_i32(INDEX_op_qemu_ld_i32, val, addr, memop, idx); } @@ -2657,7 +2657,7 @@ void tcg_gen_qemu_st_i32(TCGv_i32 val, TCGv addr, TCGArg idx, TCGMemOp memop) { tcg_gen_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST); memop = tcg_canonicalize_memop(memop, 0, 1); - trace_guest_mem_before_tcg(tcg_ctx->cpu, tcg_ctx->tcg_env, + trace_guest_mem_before_tcg(tcg_ctx->cpu, cpu_env, addr, trace_mem_get_info(memop, 1)); gen_ldst_i32(INDEX_op_qemu_st_i32, val, addr, memop, idx); } @@ -2676,7 +2676,7 @@ void tcg_gen_qemu_ld_i64(TCGv_i64 val, TCGv addr, TCGArg idx, TCGMemOp memop) } memop = tcg_canonicalize_memop(memop, 1, 0); - trace_guest_mem_before_tcg(tcg_ctx->cpu, tcg_ctx->tcg_env, + trace_guest_mem_before_tcg(tcg_ctx->cpu, cpu_env, addr, trace_mem_get_info(memop, 0)); gen_ldst_i64(INDEX_op_qemu_ld_i64, val, addr, memop, idx); } @@ -2690,7 +2690,7 @@ void tcg_gen_qemu_st_i64(TCGv_i64 val, TCGv addr, TCGArg idx, TCGMemOp memop) } memop = tcg_canonicalize_memop(memop, 1, 1); - trace_guest_mem_before_tcg(tcg_ctx->cpu, tcg_ctx->tcg_env, + trace_guest_mem_before_tcg(tcg_ctx->cpu, cpu_env, addr, trace_mem_get_info(memop, 1)); gen_ldst_i64(INDEX_op_qemu_st_i64, val, addr, memop, idx); } @@ -2806,11 +2806,11 @@ void tcg_gen_atomic_cmpxchg_i32(TCGv_i32 retv, TCGv addr, TCGv_i32 cmpv, #ifdef CONFIG_SOFTMMU { TCGv_i32 oi = tcg_const_i32(make_memop_idx(memop & ~MO_SIGN, idx)); - gen(retv, tcg_ctx->tcg_env, addr, cmpv, newv, oi); + gen(retv, cpu_env, addr, cmpv, newv, oi); tcg_temp_free_i32(oi); } #else - gen(retv, tcg_ctx->tcg_env, addr, cmpv, newv); + gen(retv, cpu_env, addr, cmpv, newv); #endif if (memop & MO_SIGN) { @@ -2851,14 +2851,14 @@ void tcg_gen_atomic_cmpxchg_i64(TCGv_i64 retv, TCGv addr, TCGv_i64 cmpv, #ifdef CONFIG_SOFTMMU { TCGv_i32 oi = tcg_const_i32(make_memop_idx(memop, idx)); - gen(retv, tcg_ctx->tcg_env, addr, cmpv, newv, oi); + gen(retv, cpu_env, addr, cmpv, newv, oi); tcg_temp_free_i32(oi); } #else - gen(retv, tcg_ctx->tcg_env, addr, cmpv, newv); + gen(retv, cpu_env, addr, cmpv, newv); #endif #else - gen_helper_exit_atomic(tcg_ctx->tcg_env); + gen_helper_exit_atomic(cpu_env); /* Produce a result, so that we have a well-formed opcode stream with respect to uses of the result in the (dead) code following. */ tcg_gen_movi_i64(retv, 0); @@ -2914,11 +2914,11 @@ static void do_atomic_op_i32(TCGv_i32 ret, TCGv addr, TCGv_i32 val, #ifdef CONFIG_SOFTMMU { TCGv_i32 oi = tcg_const_i32(make_memop_idx(memop & ~MO_SIGN, idx)); - gen(ret, tcg_ctx->tcg_env, addr, val, oi); + gen(ret, cpu_env, addr, val, oi); tcg_temp_free_i32(oi); } #else - gen(ret, tcg_ctx->tcg_env, addr, val); + gen(ret, cpu_env, addr, val); #endif if (memop & MO_SIGN) { @@ -2959,14 +2959,14 @@ static void do_atomic_op_i64(TCGv_i64 ret, TCGv addr, TCGv_i64 val, #ifdef CONFIG_SOFTMMU { TCGv_i32 oi = tcg_const_i32(make_memop_idx(memop & ~MO_SIGN, idx)); - gen(ret, tcg_ctx->tcg_env, addr, val, oi); + gen(ret, cpu_env, addr, val, oi); tcg_temp_free_i32(oi); } #else - gen(ret, tcg_ctx->tcg_env, addr, val); + gen(ret, cpu_env, addr, val); #endif #else - gen_helper_exit_atomic(tcg_ctx->tcg_env); + gen_helper_exit_atomic(cpu_env); /* Produce a result, so that we have a well-formed opcode stream with respect to uses of the result in the (dead) code following. */ tcg_gen_movi_i64(ret, 0); diff --git a/tcg/tcg.c b/tcg/tcg.c index 5574317736..683ff4abb7 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -121,6 +121,7 @@ static bool tcg_out_ldst_finalize(TCGContext *s); static TCGContext **tcg_ctxs; static unsigned int n_tcg_ctxs; +TCGv_env cpu_env = 0; /* * We divide code_gen_buffer into equally-sized "regions" that TCG threads @@ -657,6 +658,8 @@ static GHashTable *helper_table; static int indirect_reg_alloc_order[ARRAY_SIZE(tcg_target_reg_alloc_order)]; static void process_op_defs(TCGContext *s); +static TCGTemp *tcg_global_reg_new_internal(TCGContext *s, TCGType type, + TCGReg reg, const char *name); void tcg_context_init(TCGContext *s) { @@ -664,6 +667,7 @@ void tcg_context_init(TCGContext *s) TCGOpDef *def; TCGArgConstraint *args_ct; int *sorted_args; + TCGTemp *ts; memset(s, 0, sizeof(*s)); s->nb_globals = 0; @@ -729,6 +733,10 @@ void tcg_context_init(TCGContext *s) #else tcg_ctxs = g_new(TCGContext *, max_cpus); #endif + + tcg_debug_assert(!tcg_regset_test_reg(s->reserved_regs, TCG_AREG0)); + ts = tcg_global_reg_new_internal(s, TCG_TYPE_PTR, TCG_AREG0, "env"); + cpu_env = temp_tcgv_ptr(ts); } /* @@ -871,30 +879,6 @@ void tcg_set_frame(TCGContext *s, TCGReg reg, intptr_t start, intptr_t size) = tcg_global_reg_new_internal(s, TCG_TYPE_PTR, reg, "_frame"); } -TCGv_i32 tcg_global_reg_new_i32(TCGReg reg, const char *name) -{ - TCGContext *s = tcg_ctx; - TCGTemp *t; - - if (tcg_regset_test_reg(s->reserved_regs, reg)) { - tcg_abort(); - } - t = tcg_global_reg_new_internal(s, TCG_TYPE_I32, reg, name); - return temp_tcgv_i32(t); -} - -TCGv_i64 tcg_global_reg_new_i64(TCGReg reg, const char *name) -{ - TCGContext *s = tcg_ctx; - TCGTemp *t; - - if (tcg_regset_test_reg(s->reserved_regs, reg)) { - tcg_abort(); - } - t = tcg_global_reg_new_internal(s, TCG_TYPE_I64, reg, name); - return temp_tcgv_i64(t); -} - TCGTemp *tcg_global_mem_new_internal(TCGType type, TCGv_ptr base, intptr_t offset, const char *name) { diff --git a/tcg/tcg.h b/tcg/tcg.h index 3d022e448b..cb7b329876 100644 --- a/tcg/tcg.h +++ b/tcg/tcg.h @@ -669,7 +669,6 @@ struct TCGContext { /* Track which vCPU triggers events */ CPUState *cpu; /* *_trans */ - TCGv_env tcg_env; /* *_exec */ /* These structures are private to tcg-target.inc.c. */ #ifdef TCG_TARGET_NEED_LDST_LABELS @@ -696,6 +695,7 @@ struct TCGContext { extern TCGContext tcg_init_ctx; extern __thread TCGContext *tcg_ctx; +extern TCGv_env cpu_env; static inline size_t temp_idx(TCGTemp *ts) { @@ -839,9 +839,6 @@ void tcg_set_frame(TCGContext *s, TCGReg reg, intptr_t start, intptr_t size); TCGTemp *tcg_global_mem_new_internal(TCGType, TCGv_ptr, intptr_t, const char *); -TCGv_i32 tcg_global_reg_new_i32(TCGReg reg, const char *name); -TCGv_i64 tcg_global_reg_new_i64(TCGReg reg, const char *name); - TCGv_i32 tcg_temp_new_internal_i32(int temp_local); TCGv_i64 tcg_temp_new_internal_i64(int temp_local); @@ -960,8 +957,6 @@ static inline TCGv_ptr TCGV_NAT_TO_PTR(TCGv_i32 n) { return (TCGv_ptr)n; } static inline TCGv_i32 TCGV_PTR_TO_NAT(TCGv_ptr n) { return (TCGv_i32)n; } #define tcg_const_ptr(V) TCGV_NAT_TO_PTR(tcg_const_i32((intptr_t)(V))) -#define tcg_global_reg_new_ptr(R, N) \ - TCGV_NAT_TO_PTR(tcg_global_reg_new_i32((R), (N))) #define tcg_global_mem_new_ptr(R, O, N) \ TCGV_NAT_TO_PTR(tcg_global_mem_new_i32((R), (O), (N))) #define tcg_temp_new_ptr() TCGV_NAT_TO_PTR(tcg_temp_new_i32()) @@ -971,8 +966,6 @@ static inline TCGv_ptr TCGV_NAT_TO_PTR(TCGv_i64 n) { return (TCGv_ptr)n; } static inline TCGv_i64 TCGV_PTR_TO_NAT(TCGv_ptr n) { return (TCGv_i64)n; } #define tcg_const_ptr(V) TCGV_NAT_TO_PTR(tcg_const_i64((intptr_t)(V))) -#define tcg_global_reg_new_ptr(R, N) \ - TCGV_NAT_TO_PTR(tcg_global_reg_new_i64((R), (N))) #define tcg_global_mem_new_ptr(R, O, N) \ TCGV_NAT_TO_PTR(tcg_global_mem_new_i64((R), (O), (N))) #define tcg_temp_new_ptr() TCGV_NAT_TO_PTR(tcg_temp_new_i64()) -- cgit v1.2.1