From c4efe1cada311b9dc0df5beb71c4227ff3414aa1 Mon Sep 17 00:00:00 2001 From: Anthony Liguori Date: Tue, 16 Apr 2013 09:45:16 -0500 Subject: qtest: add libqos including PCI support This includes basic PCI support for the PC platform. Enough abstraction should be present to support non-PC platforms too. Signed-off-by: Anthony Liguori Message-id: 1366123521-4330-3-git-send-email-aliguori@us.ibm.com --- tests/libqos/pci.h | 80 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 80 insertions(+) create mode 100644 tests/libqos/pci.h (limited to 'tests/libqos/pci.h') diff --git a/tests/libqos/pci.h b/tests/libqos/pci.h new file mode 100644 index 0000000000..3439431540 --- /dev/null +++ b/tests/libqos/pci.h @@ -0,0 +1,80 @@ +/* + * libqos PCI bindings + * + * Copyright IBM, Corp. 2012-2013 + * + * Authors: + * Anthony Liguori + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ + +#ifndef LIBQOS_PCI_H +#define LIBQOS_PCI_H + +#include + +#define QPCI_DEVFN(dev, fn) (((dev) << 3) | (fn)) + +typedef struct QPCIDevice QPCIDevice; +typedef struct QPCIBus QPCIBus; + +struct QPCIBus +{ + uint8_t (*io_readb)(QPCIBus *bus, void *addr); + uint16_t (*io_readw)(QPCIBus *bus, void *addr); + uint32_t (*io_readl)(QPCIBus *bus, void *addr); + + void (*io_writeb)(QPCIBus *bus, void *addr, uint8_t value); + void (*io_writew)(QPCIBus *bus, void *addr, uint16_t value); + void (*io_writel)(QPCIBus *bus, void *addr, uint32_t value); + + uint8_t (*config_readb)(QPCIBus *bus, int devfn, uint8_t offset); + uint16_t (*config_readw)(QPCIBus *bus, int devfn, uint8_t offset); + uint32_t (*config_readl)(QPCIBus *bus, int devfn, uint8_t offset); + + void (*config_writeb)(QPCIBus *bus, int devfn, + uint8_t offset, uint8_t value); + void (*config_writew)(QPCIBus *bus, int devfn, + uint8_t offset, uint16_t value); + void (*config_writel)(QPCIBus *bus, int devfn, + uint8_t offset, uint32_t value); + + void *(*iomap)(QPCIBus *bus, QPCIDevice *dev, int barno); + void (*iounmap)(QPCIBus *bus, void *data); +}; + +struct QPCIDevice +{ + QPCIBus *bus; + int devfn; +}; + +void qpci_device_foreach(QPCIBus *bus, int vendor_id, int device_id, + void (*func)(QPCIDevice *dev, int devfn, void *data), + void *data); +QPCIDevice *qpci_device_find(QPCIBus *bus, int devfn); + +void qpci_device_enable(QPCIDevice *dev); + +uint8_t qpci_config_readb(QPCIDevice *dev, uint8_t offset); +uint16_t qpci_config_readw(QPCIDevice *dev, uint8_t offset); +uint32_t qpci_config_readl(QPCIDevice *dev, uint8_t offset); + +void qpci_config_writeb(QPCIDevice *dev, uint8_t offset, uint8_t value); +void qpci_config_writew(QPCIDevice *dev, uint8_t offset, uint16_t value); +void qpci_config_writel(QPCIDevice *dev, uint8_t offset, uint32_t value); + +uint8_t qpci_io_readb(QPCIDevice *dev, void *data); +uint16_t qpci_io_readw(QPCIDevice *dev, void *data); +uint32_t qpci_io_readl(QPCIDevice *dev, void *data); + +void qpci_io_writeb(QPCIDevice *dev, void *data, uint8_t value); +void qpci_io_writew(QPCIDevice *dev, void *data, uint16_t value); +void qpci_io_writel(QPCIDevice *dev, void *data, uint32_t value); + +void *qpci_iomap(QPCIDevice *dev, int barno); +void qpci_iounmap(QPCIDevice *dev, void *data); + +#endif -- cgit v1.2.1