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author | Peter Wu <lekensteyn@gmail.com> | 2011-12-07 12:37:06 +0000 |
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committer | Peter Wu <lekensteyn@gmail.com> | 2011-12-07 12:37:06 +0000 |
commit | 134d1ee7aa3eca21d5dd697e7d405cd9424b9dd4 (patch) | |
tree | c91c98201b26020f187e79ef1669f0fc08f9a1ed /pp2cc.py | |
parent | 14c7b8af3a04f739ebd192b9efd22cd5422525c1 (diff) | |
download | pp2cc-134d1ee7aa3eca21d5dd697e7d405cd9424b9dd4.tar.gz |
Fix PSW flags after doing a divison/modulo operation
Diffstat (limited to 'pp2cc.py')
-rwxr-xr-x | pp2cc.py | 4 |
1 files changed, 4 insertions, 0 deletions
@@ -396,6 +396,10 @@ class Parse(object): lines += self.processShift(node.op, reg_first, operand, linked_node) else: lines.append(self.asm.binary_op(op, reg_first, operand)) + # explicitly set the PSW words because DIV and MOD are stupid and set + # the Z flag depending on the remainder + if op in ("DIV", "MOD"): + lines.append(self.asm.binary_op("LOAD", reg_first, reg_first)) return lines def processShift(self, operator, reg_number, operand_shift, linked_node=None): """Returns lines for a shift expression |