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authorJussi Kivilinna <jussi.kivilinna@iki.fi>2015-04-22 20:29:05 +0300
committerJussi Kivilinna <jussi.kivilinna@iki.fi>2015-04-26 13:43:24 +0300
commitf88266c0f868d7bf51a215d5531bb9f2b4dad19e (patch)
tree42e916141425016d6887a6992e09d18269f35aa4 /cipher/cipher-gcm-intel-pclmul.c
parent305cc878d395475c46b4ef52f4764bd0c85bf8ac (diff)
downloadlibgcrypt-f88266c0f868d7bf51a215d5531bb9f2b4dad19e.tar.gz
Disallow compiler from generating SSE instructions in mixed C+asm source
* cipher/cipher-gcm-intel-pclmul.c [gcc-version >= 4.4]: Add GCC target pragma to disable compiler use of SSE. * cipher/rijndael-aesni.c [gcc-version >= 4.4]: Ditto. * cipher/rijndael-ssse3-amd64.c [gcc-version >= 4.4]: Ditto. -- These implementations assume that compiler does not use XMM registers between assembly blocks. Signed-off-by: Jussi Kivilinna <jussi.kivilinna@iki.fi>
Diffstat (limited to 'cipher/cipher-gcm-intel-pclmul.c')
-rw-r--r--cipher/cipher-gcm-intel-pclmul.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/cipher/cipher-gcm-intel-pclmul.c b/cipher/cipher-gcm-intel-pclmul.c
index 03144583..79648ce9 100644
--- a/cipher/cipher-gcm-intel-pclmul.c
+++ b/cipher/cipher-gcm-intel-pclmul.c
@@ -32,6 +32,13 @@
#ifdef GCM_USE_INTEL_PCLMUL
+
+#if _GCRY_GCC_VERSION >= 40400 /* 4.4 */
+/* Prevent compiler from issuing SSE instructions between asm blocks. */
+# pragma GCC target("no-sse")
+#endif
+
+
/*
Intel PCLMUL ghash based on white paper:
"IntelĀ® Carry-Less Multiplication Instruction and its Usage for Computing the