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authorJussi Kivilinna <jussi.kivilinna@iki.fi>2013-10-22 17:07:53 +0300
committerJussi Kivilinna <jussi.kivilinna@iki.fi>2013-10-22 19:56:45 +0300
commite67c67321ce240c93dd0fa2b21c649c0a8e233f7 (patch)
tree525d9dee7dae322804d3d678c2805a459f0cf334 /mpi/longlong.h
parentc7efaa5fe0ee92e321a7b49d56752cc12eb75fe0 (diff)
downloadlibgcrypt-e67c67321ce240c93dd0fa2b21c649c0a8e233f7.tar.gz
mpi: allow building with clang on ARM
* mpi/longlong.h [__arm__] (add_ssaaaa, sub_ddmmss, umul_ppmm) (count_leading_zeros): Do not cast assembly output arguments. [__arm__] (umul_ppmm): Remove the extra '%' ahead of assembly comment. [_ARM_ARCH >= 4] (umul_ppmm): Use correct inputs and outputs instead of registers. -- Signed-off-by: Jussi Kivilinna <jussi.kivilinna@iki.fi>
Diffstat (limited to 'mpi/longlong.h')
-rw-r--r--mpi/longlong.h27
1 files changed, 13 insertions, 14 deletions
diff --git a/mpi/longlong.h b/mpi/longlong.h
index c2ab9c52..8c8260e5 100644
--- a/mpi/longlong.h
+++ b/mpi/longlong.h
@@ -213,8 +213,8 @@ extern UDItype __udiv_qrnnd ();
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
__asm__ ("adds %1, %4, %5\n" \
"adc %0, %2, %3" \
- : "=r" ((USItype)(sh)), \
- "=&r" ((USItype)(sl)) \
+ : "=r" ((sh)), \
+ "=&r" ((sl)) \
: "%r" ((USItype)(ah)), \
"rI" ((USItype)(bh)), \
"%r" ((USItype)(al)), \
@@ -222,15 +222,15 @@ extern UDItype __udiv_qrnnd ();
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
__asm__ ("subs %1, %4, %5\n" \
"sbc %0, %2, %3" \
- : "=r" ((USItype)(sh)), \
- "=&r" ((USItype)(sl)) \
+ : "=r" ((sh)), \
+ "=&r" ((sl)) \
: "r" ((USItype)(ah)), \
"rI" ((USItype)(bh)), \
"r" ((USItype)(al)), \
"rI" ((USItype)(bl)) __CLOBBER_CC)
#if (defined __ARM_ARCH && __ARM_ARCH <= 3)
#define umul_ppmm(xh, xl, a, b) \
- __asm__ ("%@ Inlined umul_ppmm\n" \
+ __asm__ ("@ Inlined umul_ppmm\n" \
"mov %|r0, %2, lsr #16 @ AAAA\n" \
"mov %|r2, %3, lsr #16 @ BBBB\n" \
"bic %|r1, %2, %|r0, lsl #16 @ aaaa\n" \
@@ -243,27 +243,26 @@ extern UDItype __udiv_qrnnd ();
"addcs %|r2, %|r2, #65536\n" \
"adds %1, %|r1, %|r0, lsl #16\n" \
"adc %0, %|r2, %|r0, lsr #16" \
- : "=&r" ((USItype)(xh)), \
- "=r" ((USItype)(xl)) \
+ : "=&r" ((xh)), \
+ "=r" ((xl)) \
: "r" ((USItype)(a)), \
"r" ((USItype)(b)) \
: "r0", "r1", "r2" __CLOBBER_CC)
#else /* __ARM_ARCH >= 4 */
#define umul_ppmm(xh, xl, a, b) \
- __asm__ ("%@ Inlined umul_ppmm\n" \
- "umull %r1, %r0, %r2, %r3" \
- : "=&r" ((USItype)(xh)), \
- "=r" ((USItype)(xl)) \
+ __asm__ ("@ Inlined umul_ppmm\n" \
+ "umull %1, %0, %2, %3" \
+ : "=&r" ((xh)), \
+ "=r" ((xl)) \
: "r" ((USItype)(a)), \
- "r" ((USItype)(b)) \
- : "r0", "r1")
+ "r" ((USItype)(b)))
#endif /* __ARM_ARCH >= 4 */
#define UMUL_TIME 20
#define UDIV_TIME 100
#if (defined __ARM_ARCH && __ARM_ARCH >= 5)
#define count_leading_zeros(count, x) \
__asm__ ("clz %0, %1" \
- : "=r" ((USItype)(count)) \
+ : "=r" ((count)) \
: "r" ((USItype)(x)))
#endif /* __ARM_ARCH >= 5 */
#endif /* __arm__ */