diff options
| author | Tom Musta <tommusta@gmail.com> | 2014-11-14 14:01:41 -0600 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2014-11-20 14:52:01 +0100 |
| commit | 76cb6584196b6f35d6e9b5124974d3eba643f772 (patch) | |
| tree | bc4f474c4ced32b5fedb6d8ca18bac3db763505f | |
| parent | f2a64032a14c642d0ddc9a7a846fc3d737deede5 (diff) | |
| download | qemu-76cb6584196b6f35d6e9b5124974d3eba643f772.tar.gz | |
target-ppc: Altivec's mtvscr Decodes Wrong Register
The Move to Vector Status and Control Register (mtvscr) instruction
uses VRB as the source register. Fix the code generator to correctly
decode the VRB field. That is, use "rB(ctx->opcode)" instead of
"rD(ctx->opcode)".
Signed-off-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
| -rw-r--r-- | target-ppc/translate.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 910ce56ec1..d381632c86 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -6848,7 +6848,7 @@ static void gen_mtvscr(DisasContext *ctx) gen_exception(ctx, POWERPC_EXCP_VPU); return; } - p = gen_avr_ptr(rD(ctx->opcode)); + p = gen_avr_ptr(rB(ctx->opcode)); gen_helper_mtvscr(cpu_env, p); tcg_temp_free_ptr(p); } |