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| author | Richard Henderson <rth@twiddle.net> | 2015-12-11 09:17:45 -0800 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2016-02-09 10:19:32 +1100 |
| commit | 201577059331b8b3aef221ee2ed594deb99d6631 (patch) | |
| tree | 04aba76447d45125bb2e91adf16cd6428002e9ac | |
| parent | 23dceda62a3643f734b7aa474fa6052593ae1a70 (diff) | |
| download | qemu-201577059331b8b3aef221ee2ed594deb99d6631.tar.gz | |
tcg: Remove lingering references to gen_opc_buf
Three in comments and one in code in the stub tcg_liveness_analysis.
Signed-off-by: Richard Henderson <rth@twiddle.net>
| -rw-r--r-- | target-arm/translate.c | 3 | ||||
| -rw-r--r-- | target-i386/translate.c | 3 | ||||
| -rw-r--r-- | target-unicore32/translate.c | 3 | ||||
| -rw-r--r-- | tcg/tcg.c | 3 |
4 files changed, 4 insertions, 8 deletions
diff --git a/target-arm/translate.c b/target-arm/translate.c index 3ec758ad6f..bac2e6174f 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -11209,8 +11209,7 @@ static bool insn_crosses_page(CPUARMState *env, DisasContext *s) return false; } -/* generate intermediate code in gen_opc_buf and gen_opparam_buf for - basic block 'tb'. */ +/* generate intermediate code for basic block 'tb'. */ void gen_intermediate_code(CPUARMState *env, TranslationBlock *tb) { ARMCPU *cpu = arm_env_get_cpu(env); diff --git a/target-i386/translate.c b/target-i386/translate.c index 73a45c872e..2dde47675e 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -7878,8 +7878,7 @@ void tcg_x86_init(void) helper_lock_init(); } -/* generate intermediate code in gen_opc_buf and gen_opparam_buf for - basic block 'tb'. */ +/* generate intermediate code for basic block 'tb'. */ void gen_intermediate_code(CPUX86State *env, TranslationBlock *tb) { X86CPU *cpu = x86_env_get_cpu(env); diff --git a/target-unicore32/translate.c b/target-unicore32/translate.c index 7dbfe3bd03..ec2cc13eb6 100644 --- a/target-unicore32/translate.c +++ b/target-unicore32/translate.c @@ -1860,8 +1860,7 @@ static void disas_uc32_insn(CPUUniCore32State *env, DisasContext *s) } } -/* generate intermediate code in gen_opc_buf and gen_opparam_buf for - basic block 'tb'. */ +/* generate intermediate code for basic block 'tb'. */ void gen_intermediate_code(CPUUniCore32State *env, TranslationBlock *tb) { UniCore32CPU *cpu = uc32_env_get_cpu(env); @@ -1576,8 +1576,7 @@ static void tcg_liveness_analysis(TCGContext *s) /* dummy liveness analysis */ static void tcg_liveness_analysis(TCGContext *s) { - int nb_ops; - nb_ops = s->gen_opc_ptr - s->gen_opc_buf; + int nb_ops = s->gen_next_op_idx; s->op_dead_args = tcg_malloc(nb_ops * sizeof(uint16_t)); memset(s->op_dead_args, 0, nb_ops * sizeof(uint16_t)); |