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authoraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2008-12-06 22:01:01 +0000
committeraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2008-12-06 22:01:01 +0000
commit8983da70c408df3d2159f508d219e17e99396db9 (patch)
treea77e1d479f92cb4e3e4c4ed7df6df341d39e6dd2
parent74d37793f4ea5f30ed6c0af6c449a204dacd8b44 (diff)
downloadqemu-8983da70c408df3d2159f508d219e17e99396db9.tar.gz
target-ppc: remove dead code
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5896 c046a42c-6fe2-441c-8c8c-71466251a162
-rw-r--r--target-ppc/cpu.h6
-rw-r--r--target-ppc/exec.h4
-rw-r--r--target-ppc/op_helper.h3
-rw-r--r--target-ppc/translate.c14
4 files changed, 2 insertions, 25 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 3911f28f2d..a9bd0098cd 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -530,11 +530,7 @@ struct CPUPPCState {
* during translated code execution
*/
#if TARGET_LONG_BITS > HOST_LONG_BITS
- target_ulong t0, t1;
-#endif
- /* XXX: this is a temporary workaround for i386. cf translate.c comment */
-#if (TARGET_LONG_BITS > HOST_LONG_BITS) || defined(HOST_I386)
- target_ulong t2;
+ target_ulong t0;
#endif
/* general purpose registers */
diff --git a/target-ppc/exec.h b/target-ppc/exec.h
index 4e2802ef81..cc7c924ac5 100644
--- a/target-ppc/exec.h
+++ b/target-ppc/exec.h
@@ -35,13 +35,9 @@ register struct CPUPPCState *env asm(AREG0);
#if TARGET_LONG_BITS > HOST_LONG_BITS
/* no registers can be used */
#define T0 (env->t0)
-#define T1 (env->t1)
-#define T2 (env->t2)
#define TDX "%016" PRIx64
#else
register target_ulong T0 asm(AREG1);
-register target_ulong T1 asm(AREG2);
-register target_ulong T2 asm(AREG3);
#define TDX "%016lx"
#endif
diff --git a/target-ppc/op_helper.h b/target-ppc/op_helper.h
index 1de35a1b0b..0fc379a8e1 100644
--- a/target-ppc/op_helper.h
+++ b/target-ppc/op_helper.h
@@ -18,8 +18,6 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
-void do_print_mem_EA (target_ulong EA);
-
/* Registers load and stores */
#if defined(TARGET_PPC64)
void do_store_pri (int prio);
@@ -30,7 +28,6 @@ void ppc_store_dump_spr (int sprn, target_ulong val);
/* Misc */
/* POWER / PowerPC 601 specific helpers */
#if !defined(CONFIG_USER_ONLY)
-void do_POWER_rac (void);
void do_store_hid0_601 (void);
#endif
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index e486c2316e..b34de137c7 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -72,7 +72,7 @@ static TCGv_i32 cpu_fpscr;
static TCGv_i32 cpu_access_type;
/* dyngen register indexes */
-static TCGv cpu_T[3];
+static TCGv cpu_T[1];
#include "gen-icount.h"
@@ -88,20 +88,8 @@ void ppc_translate_init(void)
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
#if TARGET_LONG_BITS > HOST_LONG_BITS
cpu_T[0] = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, t0), "T0");
- cpu_T[1] = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, t1), "T1");
- cpu_T[2] = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, t2), "T2");
#else
cpu_T[0] = tcg_global_reg_new(TCG_AREG1, "T0");
- cpu_T[1] = tcg_global_reg_new(TCG_AREG2, "T1");
-#ifdef HOST_I386
- /* XXX: This is a temporary workaround for i386.
- * On i386 qemu_st32 runs out of registers.
- * The proper fix is to remove cpu_T.
- */
- cpu_T[2] = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, t2), "T2");
-#else
- cpu_T[2] = tcg_global_reg_new(TCG_AREG3, "T2");
-#endif
#endif
p = cpu_reg_names;