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| author | Michael Clark <mjc@sifive.com> | 2018-04-09 12:06:30 +1200 |
|---|---|---|
| committer | Michael Clark <mjc@sifive.com> | 2018-05-06 10:39:38 +1200 |
| commit | e21659057066f2f4d42fa51a62ff07a23a632e40 (patch) | |
| tree | 15ec640e089979c2446e6ab6954fb5c3d087a461 | |
| parent | 67185dad16284467dba9b6159f9ec9ec53689582 (diff) | |
| download | qemu-e21659057066f2f4d42fa51a62ff07a23a632e40.tar.gz | |
RISC-V: Allow S-mode mxr access when priv ISA >= v1.10
The mstatus.MXR alias in sstatus should only be writable
by S-mode if the privileged ISA version >= v1.10. Also MXR
was masked in sstatus CSR read but not sstatus CSR writes.
Now we correctly mask sstatus.mxr in both read and write.
Cc: Sagar Karandikar <sagark@eecs.berkeley.edu>
Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Cc: Palmer Dabbelt <palmer@sifive.com>
Cc: Alistair Francis <Alistair.Francis@wdc.com>
Signed-off-by: Michael Clark <mjc@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
| -rw-r--r-- | target/riscv/op_helper.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c index 101dac1ee8..f45ac7306c 100644 --- a/target/riscv/op_helper.c +++ b/target/riscv/op_helper.c @@ -234,7 +234,10 @@ void csr_write_helper(CPURISCVState *env, target_ulong val_to_write, target_ulong ms = env->mstatus; target_ulong mask = SSTATUS_SIE | SSTATUS_SPIE | SSTATUS_UIE | SSTATUS_UPIE | SSTATUS_SPP | SSTATUS_FS | SSTATUS_XS - | SSTATUS_SUM | SSTATUS_MXR | SSTATUS_SD; + | SSTATUS_SUM | SSTATUS_SD; + if (env->priv_ver >= PRIV_VERSION_1_10_0) { + mask |= SSTATUS_MXR; + } ms = (ms & ~mask) | (val_to_write & mask); csr_write_helper(env, ms, CSR_MSTATUS); break; @@ -441,7 +444,7 @@ target_ulong csr_read_helper(CPURISCVState *env, target_ulong csrno) case CSR_SSTATUS: { target_ulong mask = SSTATUS_SIE | SSTATUS_SPIE | SSTATUS_UIE | SSTATUS_UPIE | SSTATUS_SPP | SSTATUS_FS | SSTATUS_XS - | SSTATUS_SUM | SSTATUS_SD; + | SSTATUS_SUM | SSTATUS_SD; if (env->priv_ver >= PRIV_VERSION_1_10_0) { mask |= SSTATUS_MXR; } |