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authorAurelien Jarno <aurelien@aurel32.net>2015-07-31 16:38:25 +0200
committerMichael Roth <mdroth@linux.vnet.ibm.com>2015-08-04 12:30:37 -0500
commite750591c8abc0f68296f1afa9f3b9e678b4a28be (patch)
treefe8bd6ab8dfe93d82ab13a10b5bbd858e45088f1
parentf9c0ae272389b3581be13fe13986d7c509995be1 (diff)
downloadqemu-e750591c8abc0f68296f1afa9f3b9e678b4a28be.tar.gz
tcg/mips: fix add2
The add2 code in the tcg_out_addsub2 function doesn't take into account the case where rl == al == bl. In that case we can't compute the carry after the addition. As it corresponds to a multiplication by 2, the carry bit is the bit 31. While this is a corner case, this prevents x86-64 guests to boot on a MIPS host. Cc: qemu-stable@nongnu.org Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> (cherry picked from commit c99d69694af4ed15b33e3f7c2e3ef6972c14358d) Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
-rw-r--r--tcg/mips/tcg-target.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c
index 6ca35a7d05..015ceab840 100644
--- a/tcg/mips/tcg-target.c
+++ b/tcg/mips/tcg-target.c
@@ -1269,6 +1269,9 @@ static void tcg_out_addsub2(TCGContext *s, TCGReg rl, TCGReg rh, TCGReg al,
if (cbl) {
tcg_out_opc_imm(s, OPC_ADDIU, rl, al, bl);
tcg_out_opc_imm(s, OPC_SLTIU, TCG_TMP0, rl, bl);
+ } else if (rl == al && rl == bl) {
+ tcg_out_opc_sa(s, OPC_SRL, TCG_TMP0, al, 31);
+ tcg_out_opc_reg(s, OPC_ADDU, rl, al, bl);
} else {
tcg_out_opc_reg(s, OPC_ADDU, rl, al, bl);
tcg_out_opc_reg(s, OPC_SLTU, TCG_TMP0, rl, (rl == bl ? al : bl));