diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2013-04-19 11:15:20 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2013-04-19 11:15:20 +0100 |
| commit | 89a32d32fb573b32bbe129421602c2b3c3c247ec (patch) | |
| tree | 848a0f17c4f74fca1489839556742c93e2ccada1 /hw/arm | |
| parent | a2bff788d2316c037ce5ab72468b3fda1a0527a1 (diff) | |
| download | qemu-89a32d32fb573b32bbe129421602c2b3c3c247ec.tar.gz | |
versatile_pci: Expose PCI memory space to system
The VersatilePB's PCI controller exposes the PCI memory space to the
system via three regions controlled by the mapping control registers.
Implement this so that guests can actually use MMIO-BAR PCI cards.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Paul Brook <paul@codesourcery.com>
Diffstat (limited to 'hw/arm')
| -rw-r--r-- | hw/arm/realview.c | 3 | ||||
| -rw-r--r-- | hw/arm/versatilepb.c | 3 |
2 files changed, 6 insertions, 0 deletions
diff --git a/hw/arm/realview.c b/hw/arm/realview.c index 8f561c2e47..d6f47bf4d4 100644 --- a/hw/arm/realview.c +++ b/hw/arm/realview.c @@ -221,6 +221,9 @@ static void realview_init(QEMUMachineInitArgs *args, sysbus_mmio_map(busdev, 1, 0x60000000); /* PCI self-config */ sysbus_mmio_map(busdev, 2, 0x61000000); /* PCI config */ sysbus_mmio_map(busdev, 3, 0x62000000); /* PCI I/O */ + sysbus_mmio_map(busdev, 4, 0x63000000); /* PCI memory window 1 */ + sysbus_mmio_map(busdev, 5, 0x64000000); /* PCI memory window 2 */ + sysbus_mmio_map(busdev, 6, 0x68000000); /* PCI memory window 3 */ sysbus_connect_irq(busdev, 0, pic[48]); sysbus_connect_irq(busdev, 1, pic[49]); sysbus_connect_irq(busdev, 2, pic[50]); diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c index 8128fcdf10..753757ea19 100644 --- a/hw/arm/versatilepb.c +++ b/hw/arm/versatilepb.c @@ -228,6 +228,9 @@ static void versatile_init(QEMUMachineInitArgs *args, int board_id) sysbus_mmio_map(busdev, 1, 0x41000000); /* PCI self-config */ sysbus_mmio_map(busdev, 2, 0x42000000); /* PCI config */ sysbus_mmio_map(busdev, 3, 0x43000000); /* PCI I/O */ + sysbus_mmio_map(busdev, 4, 0x44000000); /* PCI memory window 1 */ + sysbus_mmio_map(busdev, 5, 0x50000000); /* PCI memory window 2 */ + sysbus_mmio_map(busdev, 6, 0x60000000); /* PCI memory window 3 */ sysbus_connect_irq(busdev, 0, sic[27]); sysbus_connect_irq(busdev, 1, sic[28]); sysbus_connect_irq(busdev, 2, sic[29]); |