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| author | Stafford Horne <shorne@gmail.com> | 2017-06-18 00:32:40 +0900 |
|---|---|---|
| committer | Stafford Horne <shorne@gmail.com> | 2017-10-21 06:35:47 +0900 |
| commit | 0ca9fa2e3c2d072ef7546190976e326ff2673a33 (patch) | |
| tree | 340316e3679845826451552981ecb2d3891f8d74 /hw/intc/Makefile.objs | |
| parent | e822e81e350825dd94f41ee2538ff1432b812eb9 (diff) | |
| download | qemu-0ca9fa2e3c2d072ef7546190976e326ff2673a33.tar.gz | |
openrisc/ompic: Add OpenRISC Multicore PIC (OMPIC)
Add OpenRISC Multicore PIC which handles inter processor interrupts
(IPI) between cores. In OpenRISC all device interrupts are routed to
each core enabling this device to be simple.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Stafford Horne <shorne@gmail.com>
Diffstat (limited to 'hw/intc/Makefile.objs')
| -rw-r--r-- | hw/intc/Makefile.objs | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/intc/Makefile.objs b/hw/intc/Makefile.objs index 78426a7daf..ae358569a1 100644 --- a/hw/intc/Makefile.objs +++ b/hw/intc/Makefile.objs @@ -43,3 +43,4 @@ obj-$(CONFIG_ASPEED_SOC) += aspeed_vic.o obj-$(CONFIG_ARM_GIC) += arm_gicv3_cpuif.o obj-$(CONFIG_MIPS_CPS) += mips_gic.o obj-$(CONFIG_NIOS2) += nios2_iic.o +obj-$(CONFIG_OMPIC) += ompic.o |