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| author | Peter Maydell <peter.maydell@linaro.org> | 2015-09-08 17:38:42 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2015-09-08 17:38:42 +0100 |
| commit | 72889c8a809f4c65796b98d5af6a18c92510ed86 (patch) | |
| tree | 65fac3a139f72a2a9c52a7998bf98e436e25059a /hw/intc/arm_gic_common.c | |
| parent | 51fd06e0eee8257fdcc147200796e362cf2298ea (diff) | |
| download | qemu-72889c8a809f4c65796b98d5af6a18c92510ed86.tar.gz | |
hw/intc/arm_gic: Drop running_irq and last_active arrays
The running_irq and last_active arrays represent state which
doesn't exist in a real hardware GIC. The only thing we use
them for is updating the running priority when an interrupt
is completed, but in fact we can use the active-priority
registers to do this. The running priority is always the
priority corresponding to the lowest set bit in the active
priority registers, because only one interrupt at any
particular priority can be active at once.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1438089748-5528-5-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'hw/intc/arm_gic_common.c')
| -rw-r--r-- | hw/intc/arm_gic_common.c | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/hw/intc/arm_gic_common.c b/hw/intc/arm_gic_common.c index 43c103e280..aa0e7d8dc2 100644 --- a/hw/intc/arm_gic_common.c +++ b/hw/intc/arm_gic_common.c @@ -59,8 +59,8 @@ static const VMStateDescription vmstate_gic_irq_state = { static const VMStateDescription vmstate_gic = { .name = "arm_gic", - .version_id = 11, - .minimum_version_id = 11, + .version_id = 12, + .minimum_version_id = 12, .pre_save = gic_pre_save, .post_load = gic_post_load, .fields = (VMStateField[]) { @@ -71,10 +71,8 @@ static const VMStateDescription vmstate_gic = { VMSTATE_UINT8_ARRAY(irq_target, GICState, GIC_MAXIRQ), VMSTATE_UINT8_2DARRAY(priority1, GICState, GIC_INTERNAL, GIC_NCPU), VMSTATE_UINT8_ARRAY(priority2, GICState, GIC_MAXIRQ - GIC_INTERNAL), - VMSTATE_UINT16_2DARRAY(last_active, GICState, GIC_MAXIRQ, GIC_NCPU), VMSTATE_UINT8_2DARRAY(sgi_pending, GICState, GIC_NR_SGIS, GIC_NCPU), VMSTATE_UINT16_ARRAY(priority_mask, GICState, GIC_NCPU), - VMSTATE_UINT16_ARRAY(running_irq, GICState, GIC_NCPU), VMSTATE_UINT16_ARRAY(running_priority, GICState, GIC_NCPU), VMSTATE_UINT16_ARRAY(current_pending, GICState, GIC_NCPU), VMSTATE_UINT8_ARRAY(bpr, GICState, GIC_NCPU), @@ -174,7 +172,6 @@ static void arm_gic_common_reset(DeviceState *dev) s->priority_mask[i] = 0; } s->current_pending[i] = 1023; - s->running_irq[i] = 1023; s->running_priority[i] = 0x100; s->cpu_ctlr[i] = 0; s->bpr[i] = GIC_MIN_BPR; |