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| author | Michael Walle <michael@walle.cc> | 2011-02-17 23:45:07 +0100 |
|---|---|---|
| committer | Edgar E. Iglesias <edgar.iglesias@gmail.com> | 2011-03-07 13:42:36 +0100 |
| commit | 4ef66fa71882a8f8682d9a8d1528e1ec98c264e5 (patch) | |
| tree | 853c28ded1d1d394dceb86920823c180ef99a57d /hw/lm32_pic.h | |
| parent | 0c45d3d4b921e9639a2ce400a6afdb4d962a5805 (diff) | |
| download | qemu-4ef66fa71882a8f8682d9a8d1528e1ec98c264e5.tar.gz | |
lm32: interrupt controller model
This patch adds the interrupt controller of the lm32. Because the PIC is
accessed through special control registers and opcodes, there are callbacks
from the lm32 translation code to this model.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Diffstat (limited to 'hw/lm32_pic.h')
| -rw-r--r-- | hw/lm32_pic.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/hw/lm32_pic.h b/hw/lm32_pic.h new file mode 100644 index 0000000000..e6479b8f63 --- /dev/null +++ b/hw/lm32_pic.h @@ -0,0 +1,11 @@ +#ifndef QEMU_HW_LM32_PIC_H +#define QEMU_HW_LM32_PIC_H + +#include "qemu-common.h" + +uint32_t lm32_pic_get_ip(DeviceState *d); +uint32_t lm32_pic_get_im(DeviceState *d); +void lm32_pic_set_ip(DeviceState *d, uint32_t ip); +void lm32_pic_set_im(DeviceState *d, uint32_t im); + +#endif /* QEMU_HW_LM32_PIC_H */ |