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authorJan Kiszka <jan.kiszka@siemens.com>2011-10-07 09:19:35 +0200
committerBlue Swirl <blauwirbel@gmail.com>2011-10-16 11:10:48 +0000
commitb881fbe9f7a60ceaef20b7a234c49473d009bf4d (patch)
treeaaa660e442e54b245389a8237e10bfe3aa7a216b /hw/pc.h
parent2e9947d2eaf1e9cbeb22ff15064bc70e7c9afe1e (diff)
downloadqemu-b881fbe9f7a60ceaef20b7a234c49473d009bf4d.tar.gz
pc: Generalize ISA IRQs to GSIs
The ISA bus IRQ range is 0..15. What isa_irq_handler and IsaIrqState are actually dealing with are the Global System Interrupts. Refactor the code to clarify this. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'hw/pc.h')
-rw-r--r--hw/pc.h18
1 files changed, 10 insertions, 8 deletions
diff --git a/hw/pc.h b/hw/pc.h
index f3e21b6225..558d9a5f96 100644
--- a/hw/pc.h
+++ b/hw/pc.h
@@ -8,6 +8,7 @@
#include "fdc.h"
#include "net.h"
#include "memory.h"
+#include "ioapic.h"
/* PC-style peripherals (also used by other machines). */
@@ -70,15 +71,16 @@ uint32_t pic_intack_read(PicState2 *s);
void pic_info(Monitor *mon);
void irq_info(Monitor *mon);
-/* ISA */
-#define IOAPIC_NUM_PINS 0x18
+/* Global System Interrupts */
-typedef struct isa_irq_state {
- qemu_irq *i8259;
- qemu_irq ioapic[IOAPIC_NUM_PINS];
-} IsaIrqState;
+#define GSI_NUM_PINS IOAPIC_NUM_PINS
-void isa_irq_handler(void *opaque, int n, int level);
+typedef struct GSIState {
+ qemu_irq *i8259_irq;
+ qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
+} GSIState;
+
+void gsi_handler(void *opaque, int n, int level);
/* i8254.c */
@@ -141,7 +143,7 @@ void pc_memory_init(MemoryRegion *system_memory,
MemoryRegion **ram_memory);
qemu_irq *pc_allocate_cpu_irq(void);
void pc_vga_init(PCIBus *pci_bus);
-void pc_basic_device_init(qemu_irq *isa_irq,
+void pc_basic_device_init(qemu_irq *gsi,
ISADevice **rtc_state,
bool no_vmport);
void pc_init_ne2k_isa(NICInfo *nd);