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authorTiejun Chen <tiejun.chen@intel.com>2015-07-15 13:37:50 +0800
committerStefano Stabellini <stefano.stabellini@eu.citrix.com>2015-09-10 12:04:29 +0000
commit5cec8aa38cc3b7c8cf9ce66abdda28b3598e2d88 (patch)
tree941cd81f5141e33369ead449debbbb8d0a31c573 /hw/xen/xen_pt.h
parent998250e976613decf9e0da68b3922df330eac3f6 (diff)
downloadqemu-5cec8aa38cc3b7c8cf9ce66abdda28b3598e2d88.tar.gz
xen, gfx passthrough: add opregion mapping
The OpRegion shouldn't be mapped 1:1 because the address in the host can't be used in the guest directly. This patch traps read and write access to the opregion of the Intel GPU config space (offset 0xfc). The original patch is from Jean Guyader <jean.guyader@eu.citrix.com> Signed-off-by: Tiejun Chen <tiejun.chen@intel.com> Signed-off-by: Yang Zhang <yang.z.zhang@Intel.com> Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Diffstat (limited to 'hw/xen/xen_pt.h')
-rw-r--r--hw/xen/xen_pt.h6
1 files changed, 5 insertions, 1 deletions
diff --git a/hw/xen/xen_pt.h b/hw/xen/xen_pt.h
index a33e95ceb2..e89d231128 100644
--- a/hw/xen/xen_pt.h
+++ b/hw/xen/xen_pt.h
@@ -40,6 +40,9 @@ typedef struct XenPCIPassthroughState XenPCIPassthroughState;
#define XEN_PT_DEVICE(obj) \
OBJECT_CHECK(XenPCIPassthroughState, (obj), TYPE_XEN_PT_DEVICE)
+uint32_t igd_read_opregion(XenPCIPassthroughState *s);
+void igd_write_opregion(XenPCIPassthroughState *s, uint32_t val);
+
/* function type for config reg */
typedef int (*xen_pt_conf_reg_init)
(XenPCIPassthroughState *, XenPTRegInfo *, uint32_t real_offset,
@@ -66,8 +69,9 @@ typedef int (*xen_pt_conf_byte_read)
#define XEN_PT_BAR_ALLF 0xFFFFFFFF
#define XEN_PT_BAR_UNMAPPED (-1)
-#define PCI_CAP_MAX 48
+#define XEN_PCI_CAP_MAX 48
+#define XEN_PCI_INTEL_OPREGION 0xfc
typedef enum {
XEN_PT_GRP_TYPE_HARDWIRED = 0, /* 0 Hardwired reg group */