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| author | Peter Maydell <peter.maydell@linaro.org> | 2017-02-20 15:35:59 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2017-02-28 16:18:49 +0000 |
| commit | 618119c2d39dc015e3bb27b69ab2000a6ae2289a (patch) | |
| tree | b3b257d88db08ab8434943a50558095936d82491 /include/hw/arm | |
| parent | 21e0c38fe2aa93b76a0aef967b921de8f2b19cf1 (diff) | |
| download | qemu-618119c2d39dc015e3bb27b69ab2000a6ae2289a.tar.gz | |
armv7m: Make ARMv7M object take memory region link
Make the ARMv7M object take a memory region link which it uses
to wire up the bitband rather than having them always put
themselves in the system address space.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 1487604965-23220-6-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'include/hw/arm')
| -rw-r--r-- | include/hw/arm/armv7m.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/include/hw/arm/armv7m.h b/include/hw/arm/armv7m.h index 193ad71b82..3333c91e88 100644 --- a/include/hw/arm/armv7m.h +++ b/include/hw/arm/armv7m.h @@ -35,6 +35,9 @@ typedef struct { * + Named GPIO output SYSRESETREQ: signalled for guest AIRCR.SYSRESETREQ * + Property "cpu-model": CPU model to instantiate * + Property "num-irq": number of external IRQ lines + * + Property "memory": MemoryRegion defining the physical address space + * that CPU accesses see. (The NVIC, bitbanding and other CPU-internal + * devices will be automatically layered on top of this view.) */ typedef struct ARMv7MState { /*< private >*/ @@ -44,8 +47,15 @@ typedef struct ARMv7MState { BitBandState bitband[ARMV7M_NUM_BITBANDS]; ARMCPU *cpu; + /* MemoryRegion we pass to the CPU, with our devices layered on + * top of the ones the board provides in board_memory. + */ + MemoryRegion container; + /* Properties */ char *cpu_model; + /* MemoryRegion the board provides to us (with its devices, RAM, etc) */ + MemoryRegion *board_memory; } ARMv7MState; #endif |