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| author | Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> | 2017-12-21 07:32:57 +0000 |
|---|---|---|
| committer | Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> | 2018-01-09 21:48:19 +0000 |
| commit | 4b10c8d7012eea39e96819545eb21d28228831c6 (patch) | |
| tree | 34c80f9ee32da41909708cdfa02f3b063c1713d2 /include/hw/pci-host | |
| parent | 33c5eb02c4f51515896a5a13cb68f6f01ce8d0af (diff) | |
| download | qemu-4b10c8d7012eea39e96819545eb21d28228831c6.tar.gz | |
ebus: wire up OBIO interrupts to APB pbm via qdev GPIOs
This enables us to remove the static array mapping in the ISA IRQ
handler (and the embedded reference to the APB device) by formalising
the interrupt wiring via the qdev GPIO API.
For more clarity we replace the APB OBIO interrupt numbers with constants
designating the interrupt source, and rename isa_irq_handler() to
ebus_isa_irq_handler().
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Diffstat (limited to 'include/hw/pci-host')
| -rw-r--r-- | include/hw/pci-host/apb.h | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/include/hw/pci-host/apb.h b/include/hw/pci-host/apb.h index dd49437ff1..09ebd53f60 100644 --- a/include/hw/pci-host/apb.h +++ b/include/hw/pci-host/apb.h @@ -52,6 +52,13 @@ typedef struct IOMMUState { #define MAX_IVEC 0x40 +/* OBIO IVEC IRQs */ +#define OBIO_LPT_IRQ 0x22 +#define OBIO_FDD_IRQ 0x27 +#define OBIO_KBD_IRQ 0x29 +#define OBIO_MSE_IRQ 0x2a +#define OBIO_SER_IRQ 0x2b + #define TYPE_APB "pbm" #define APB_DEVICE(obj) \ @@ -76,7 +83,6 @@ typedef struct APBState { uint32_t pci_irq_map[8]; uint32_t pci_err_irq_map[4]; uint32_t obio_irq_map[32]; - qemu_irq *pbm_irqs; qemu_irq ivec_irqs[MAX_IVEC]; unsigned int irq_request; uint32_t reset_control; |